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參數(shù)資料
| 型號： | MAX3222EETP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 7/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX RS232 250KBPS LP 20TQFN |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 類型： | 收發(fā)器 |
| 驅動器/接收器數(shù)： | 2/2 |
| 規(guī)程： | RS232 |
| 電源電壓： | 3 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-WQFN 裸露焊盤 |
| 供應商設備封裝： | 20-TQFN-EP（5x5） |
| 包裝： | 帶卷 (TR) |
±15kV ESD-Protected, Down to 10nA, 3.0V to 5.5V,
Up to 1Mbps, True RS-232 Transceivers
Figure 6a shows the transmitter output voltages under
increasing load current at +3.0V. Figure 6b shows a
typical mouse connection using the MAX3241E.
High Data Rates
The MAX3222E/MAX3232E/MAX3237E/MAX3241E/
MAX3246E maintain the RS-232 ±5V minimum transmit-
ter output voltage even at high data rates. Figure 7
shows a transmitter loopback test circuit. Figure 8
shows a loopback test result at 120kbps, and Figure 9
shows the same test at 250kbps. For Figure 8, all trans-
mitters were driven simultaneously at 120kbps into RS-
232 loads in parallel with 1000pF. For Figure 9, a single
transmitter was driven at 250kbps, and all transmitters
were loaded with an RS-232 receiver in parallel with
1000pF.
The MAX3237E maintains the RS-232 ±5.0V minimum
transmitter output voltage at data rates up to 1Mbps.
Figure 10 shows a loopback test result at 1Mbps with
MBAUD = VCC. For Figure 10, all transmitters were
loaded with an RS-232 receiver in parallel with 250pF.
Interconnection with 3V and 5V Logic
The MAX3222E/MAX3232E/MAX3237E/MAX3241E/
MAX3246E can directly interface with various 5V logic
families, including ACT and HCT CMOS. See Table 3
for more information on possible combinations of inter-
connections.
UCSP Reliability
The UCSP represents a unique packaging form factor
that may not perform equally to a packaged product
through traditional mechanical reliability tests. UCSP
reliability is integrally linked to the user’s assembly
methods, circuit board material, and usage environ-
ment. The user should closely review these areas when
considering use of a UCSP package. Performance
through Operating Life Test and Moisture Resistance
remains uncompromised as the wafer-fabrication
process primarily determines it.
Mechanical stress performance is a greater considera-
tion for a UCSP package. UCSPs are attached through
direct solder contact to the user’s PC board, foregoing
the inherent stress relief of a packaged product lead
frame. Solder joint contact integrity must be consid-
ered. Table 4 shows the testing done to characterize
the UCSP reliability performance. In conclusion, the
UCSP is capable of performing reliably through envi-
ronmental stresses as indicated by the results in the
table. Additional usage data and recommendations are
detailed in Application Note 1891:
Wafer-Level
Packaging (WLP) and Its Applications.
Table 4. Reliability Test Data
TEST
CONDITIONS
DURATION
FAILURES PER
SAMPLE SIZE
Temperature Cycle
TA = -35°C to +85°C,
TA = -40°C to +100°C
150 cycles,
900 cycles
0/10,
0/200
Operating Life
TA = +70°C
240 hours
0/10
Moisture Resistance
TA = +20°C to +60°C, 90% RH
240 hours
0/10
Low-Temperature Storage
TA = -20°C
240 hours
0/10
Low-Temperature Operational
TA = -10°C
24 hours
0/10
Solderability
8-hour steam age
—
0/15
ESD
±15kV, Human Body Model
—
0/5
High-Temperature Operating
Life
TJ = +150°C
168 hours
0/45
Maxim Integrated
15
MAX3222E/MAX3232E/MAX3237E/
MAX3241E/MAX3246E
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