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參數(shù)資料
| 型號： | MAX31782ETL+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MICROCONTROLLER 40TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MAXQ® |
| 應(yīng)用： | 系統(tǒng)管理 |
| 核心處理器： | MAXQ20 |
| 程序存儲器類型： | 閃存（64 kB），ROM（8 kB） |
| RAM 容量： | 1K x 16 |
| 接口： | I²C，SM 總線 |
| 輸入/輸出數(shù)： | 5 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 包裝： | 管件 |
| 供應(yīng)商設(shè)備封裝： | 40-TQFN-EP（6x6） |
| 其它名稱： | 90-31782+T00 |
MAX31782
System Management Microcontroller
13
Watchdog Timer Reset
The watchdog timer provides a mechanism to reset the
processor in the case of undesirable code execution.
The watchdog timer is a hardware timer designed to
be periodically reset by the application software. If the
software operates correctly, the timer is reset before it
reaches its maximum count. However, if undesirable
code execution prevents a reset of the watchdog timer,
the timer reaches its maximum count and resets the
processor.
The watchdog timer is controlled through 2 bits in the
WDCN register (WDCN[5:4]: WD[1:0]). Its timeout period
can be set to one of the four programmable intervals
ranging from 212 to 221 system clock (MOSC) periods
(1.024ms to 0.524s). The watchdog interrupt occurs at
the end of this timeout period, which is 512 MOSC clock
periods, or 128s, before the reset. The reset generated
by the watchdog timer lasts for four system clock cycles,
which is 1s. Software can determine if a watchdog time
caused a reset by checking the watchdog timer reset
flag (WTRF) in the WDCN register. Execution resumes at
location 8000h following a watchdog timer reset.
External Reset
Asserting the RST pin low causes the device to enter the
reset state. The external reset function is described in
the MAX31782 User’s Guide. Execution resumes at loca-
tion 8000h after the RST pin is released.
Internal System Reset
In I2C bootload mode, the host can issue a BBh com-
mand to reset the communicating device using an I2C
slave address of 34h. This reset has the same effect as
the external reset as far as the reset values of all registers
are concerned. Also, an internal system reset can occur
when the in-system programming is done (ROD = 1).
Power Modes
The device supports two modes of operation: CPU mode
and stop mode. The device enters stop mode state after
a CPU STOP (CKCN.STOP) is asserted. On entering stop
mode, the digital core is inactive as its clock is turned
off. All the analog circuits, except ADC (including SVM,
LDOs, and monitor circuits), are still active. Stop mode
is exited by any of the following: an external interrupt on
port 6, an I2C START interrupt, an SVM interrupt, or an
external reset. For one of the mentioned interrupts to get
the device out of stop mode, it must be enabled. The
system returns to CPU mode within 10 system clocks.
If an interrupt causes the system to come out of stop
mode, the program execution starts from the point where
stop mode was asserted. However, if an external reset is
used to come out of stop mode, the program execution
begins from ORG (starting point). Table 1 explains the
state of analog/digital circuits during different modes.
Register Set
Most functions of the device are controlled by sets of
registers. These registers provide a working space for
memory operations as well as configuring and address-
ing peripheral registers on the device. Registers are
divided into two major types: system registers (SPRs)
and peripheral registers (SFRs). The common register
set, also known as the system registers, includes the
ALU, accumulator registers, data pointers, interrupt
vectors and control, and stack pointer. The peripheral
registers define additional functionality and the function-
ality is broken up into discrete modules. Both the system
registers and the peripheral registers are illustrated in
detail in the MAX31782 User’s Guide.
Table 1. Power Modes
CKCN.
STOP
SVM.
SVMEN
SVM.
SVMSTOP
CPU
LDO
(1.8V)
INTERNAL
OSCILLATOR
BROWNOUT
DETECT
SVM
MONITOR
LDO (1.8V)
MONITOR
ADC
POWER
MODE
LDO
(2.5V)
0
X
On
Off
On
On/Off
CPU Mode
On
0
1
X
On
On/Off
CPU Mode
On
1
0
X
Off
On
Off
On
Off
Stop Mode
On
1
0
Off
On
Off
On
Off
Stop Mode
On
1
Off
On
Off
Stop Mode
On
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| MAX31782ETL+ | 功能描述:16位微控制器 - MCU System Mgt MCU RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MAX31782ETL+T | 功能描述:16位微控制器 - MCU System Mgt MCU RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| MAX31782EVKIT# | 功能描述:開發(fā)板和工具包 - 其他處理器 MAX31782 Eval Kit RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| MAX31783ETM+ | 功能描述:8位微控制器 -MCU System Management MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MAX31783ETM+T | 功能描述:8位微控制器 -MCU System Management RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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