參數(shù)資料
型號(hào)： MAX3100CPD
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 微控制器/微處理器
英文描述： Dual LVDS Transmitter 8-SOIC -40 to 85
中文描述： 1 CHANNEL(S), 230.4K bps, SERIAL COMM CONTROLLER, PDIP14
封裝： PLASTIC, DIP-14
文件頁(yè)數(shù)： 12/24頁(yè)
文件大?。?/td> 263K
代理商： MAX3100CPD
Cloc k-Osc illator Baud Rates
Bits B0–B3 of the write-configuration register determine
the baud rate. Table 7 shows baud-rate divisors for given
input codes, as well as the given baud rate for
1.8432MHz and 3.6864MHz crystals. Note that the baud
rate = crystal frequency / 16x division ratio.
S hutdown Mode
In shutdown, the oscillator turns off to reduce power
dissipation (I
CC
< 10μA). The MAX3100 enters shut-
down in one of two ways: by a software command
(SHDNi bit = 1) or by a hardware command (
SHDN
=
logic low). The hardware shutdown is effective immedi-
ately and will immediately terminate any transmission in
progress. The software shutdown, requested by setting
SHDNi bit = 1, is entered upon completing the trans-
mission of the data in both the transmit register and the
transmit-buffer register. The SHDNo bit is set when the
MAX3100 enters shutdown (either hardware or soft-
ware). The microcontroller (μC) can monitor the SHDNo
bit to determine when all data has been transmitted,
and shut down any external circuitry (such as RS-232
transceivers) at that time.
Shutdown clears the receive FIFO, R, A, RA/FE,
D0r–D7r, Pr, and Pt registers and sets the T bit high.
Configuration bits (
RM
,
TM
,
PM
,
RAM
, IR, ST, PE, L,
B0-3, and RTS) can be modified when SHDNo = 1 and
CTS can also be read. Even though RA is reset upon
entering shutdown, it will go high when any transitions
are detected on the RX pin. This allows the UART to
monitor activity on the receiver when in shutdown.
The command to power up (SHDNi = 0) turns on the
oscillator when
CS
goes high if
SHDN
pin = logic high,
with a start-up time of about 25ms. This is done through
a write configuration, which clears all registers but
RTS
and
CTS
. Since the crystal oscillator typically requires
25ms to start, the first received characters will be gar-
bled, and a framing error may occur.
__________Applic ations Information
Driving Opto-Couplers
Figure 7 shows the MAX3100 in an isolated serial inter-
face. The MAX3100 Schmitt-trigger inputs are driven
directly by opto-coupler outputs. Isolated power is pro-
vided by the MAX845 transformer driver and linear reg-
ulator shown. A significant feature of this application is
that the opto-coupler’s skew does not affect the asyn-
chronous serial output’s timing. Only the set-up and
hold times of the SPI interface need to be met.
Figure 8 shows a bidirectional opto-isolated interface
using only two opto-isolators. Over 81% power savings
is realized using IrDA mode due to its 3/16-wide baud
periods.
Crystal-Osc illator Operation—
X 1, X 2 Connec tion
The MAX3100 includes a crystal oscillator for baud-rate
generation. For standard baud rates, use a 1.8432MHz
or 3.6864MHz crystal. The 1.8432MHz crystal results in
lower operating current; however, the 3.6864MHz crys-
tal may be more readily available in surface mount.
Ceramic resonators are low-cost alternatives to crystals
and operate similarly, though the “Q” and accuracy are
lower. Some ceramic resonators are available with inte-
gral load capacitors, which can further reduce cost.
The tradeoff between crystals and ceramic resonators
is in initial frequency accuracy and temperature drift.
The total error in the baud-rate generator should be
kept below 1% for reliable operation with other sys-
tems. This is accomplished easily with a crystal, and in
most cases can be achieved with ceramic resonators.
Table 8 lists the different types of crystals and res-
onators and their suppliers.
M
S PI/Mic rowire-Compatible
UART in QS OP-16
12
______________________________________________________________________________________
Table 7. Baud-Rate Selection Table*
*Standard baud rates shown in bold
**Default baud rate
115.2k
57.6k
230.4k**
BAUD
RATE
(f
OSC
=
3.6864MHz)
BAUD
B2 B1 B0
B3
2
4
0
0
0
0
0
1
1
0
1
0
0
0
0**
DIVISION
RATIO
57.6k
28.8k
115.2k**
BAUD
RATE
(f
OSC
=
1.8432MHz)
28.8k
14.4k
8
0
0
0
1
1
0
1
0
14.4k
7200
7200
3600
1800
76.8k
128
3
0
1
1
0
1
0
1
0
64
0
1
1
0
900
38.4k
1800
32
0
1
0
1
16
3600
38.4k
19.2k
9600
4800
24
48
1
1
0
1
1
0
1
0
12
1
0
1
0
4800
2400
9600
2400
1200
600
384
1
1
1
1
192
1
1
1
0
300
600
96
1
1
0
1
1200
6
1
0
0
1
19.2k
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