5GHz, 4-Channel MIMO Transmitter
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MICROWIRE is a trademark of National Semiconductor Corp.
Clockout Mode
In  clockout  mode,  only  the  crystal  oscillator  signal  is 
active at the CLKOUT pin. The rest of the transceiver is 
powered down.
Standby Mode
In standby mode, PLL, VCO, and LO generation are on. 
Tx or Rx modes can be quickly enabled from this mode. 
Other blocks may be selectively enabled in this mode.
Receive (Rx) Mode
In receive mode, all Rx circuit blocks are powered on 
and active. Antenna signal is applied; RF is downcon-
verted, filtered, and buffered at Rx baseband I and Q 
outputs.
Transmit (Tx) Mode
In transmit mode, all Tx circuit blocks are powered on 
and active. The external PA can be powered on through 
the PA_BIAS pins after a programmable delay.
Transmit Calibration
In  transmit  calibration  mode,  all  Tx  circuit  blocks  are 
powered on and active. The AM detector and receiver 
I/Q  channel  buffers  are  also  on.  Output  signals  are 
routed to Rx baseband I and Q outputs.
The AM detector multiplies the Tx RF output signal with 
itself. The self-mixing product of the wanted sideband 
becomes DC voltage and is filtered on-chip. The mix-
ing product between wanted sideband and the carrier 
leakage forms Ftone at Rx baseband output. The mixing 
product between the wanted sideband and the unwant-
ed sideband forms 2Ftone at Rx baseband output.
As Tx RF output is self-mixed at the AM detector, the 
AM detector output responds differently to different gain 
settings  and  power  levels.  When  Tx  RF  output  power 
changes by 1dB through Tx gain control, the AM detector 
output changes by 2dB as both the wanted sideband and 
carrier leakage (or unwanted sideband) change by 1dB. 
When Tx RF output carrier leakage (or unwanted side-
band) changes by 1dB while the wanted sideband output 
power is constant, the AM detector output changes by 
1dB only.
RF Loopback
In  RF  loopback  mode,  part  of  the  Rx  and  Tx  circuit 
blocks except the LNA are powered on and active. The 
transmitter 4 I/Q input signal is upconverted to RF, and 
the output of the transmitter is fed to the receiver down-
converter input. Output signals are delivered to receiver 
4 baseband I/Q outputs. The I/Q lowpass filters in the 
transmitter signal path are bypassed.
Baseband Loopback
In  baseband  loopback  mode,  part  of  the  Rx  and  Tx 
baseband circuit blocks are powered and active. The 
transmitter 4 I/Q input signal is routed to receiver low-
pass filter input. Output signals are delivered to receiver 
4 baseband I/Q outputs.
Power-On Sequence
Set the ENABLE pin to V
CC
 for 2ms to start the crystal 
oscillator. Program all SPI addresses according to rec-
ommended values. Set SPI Main address 0 D4:D2 from 
000 to 001 to engage standby mode. To lock the LO 
frequency, the user can set SPI in order of Main address 
15, Main address 16, and then Main address 17 to trig-
ger VCO sub-band autoacquisition; the acquisition will 
take 2ms. After the LO frequency is locked, set SPI Main 
address 0 D4:D2 = 010 and 011 for Rx and Tx operat-
ing modes, respectively. Before engaging Rx mode, set 
Main address 5 D1 = 1 to allow fast DC offset settling. 
After engaging Rx mode and Rx baseband DC offset 
settles, the user can set Main address 5 D1 = 0 to com-
plete Rx DC offset cancellation.
Programmable Registers and  
4-Wire SPI Interface
The  MAX2850  includes  60  programmable  16-bit  reg-
isters. The most significant bit (MSB) is the read/write 
selection bit (R/W in Figure 1). The next 5 bits are register 
address (A4:A0 in Figure 1). The 10 least significant bits 
(LSBs) are register data (D9:D0 in Figure 1). Register 
data  is  loaded  through  the  4-wire  SPI/MICROWIRE"-
compatible serial interface. MSB of data at the DIN pin 
is shifted in first and is framed by CS. When CS is low, 
the clock is active, and input data is shifted at the rising 
edge of the clock at SCLK pin. At the CS rising edge, 
the 10-bit data bits are latched into the register selected 
by address bits. See Figure 1. To support more than a 
32-register  address  using  a  5-bit  wide  address  word, 
the bit 0 of address 0 is used to select whether the 5-bit 
address word is applied to the main address or local 
address. The register values are preserved in shutdown 
mode as long as the power-supply voltage is maintained. 
There is no power-on SPI register self-reset functionality 
in the MAX2850, so the user must program all register 
values after power-up. During the read mode, register 
data selected by address bits is shifted out to the DOUT 
pin at the falling edges of the clock.