參數(shù)資料
型號(hào): MAX2452
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 衰減器
英文描述: 3V, Ultra-Low-Power Quadrature Modulator
中文描述: RF/MICROWAVE I/Q MODEM
文件頁數(shù): 5/8頁
文件大?。?/td> 64K
代理商: MAX2452
M
3V, Ultra-Low-Power
Quadrature Modulator
_______________________________________________________________________________________
5
_______________Detailed Desc ription
The MAX2452 quadrature modulator integrates several
important RF functions on a single chip. It includes dif-
ferential buffers for the baseband inputs, two double-
balanced mixers, a local oscillator, a quadrature phase
generator, and a divide-by-8 prescaler. The prescaler
simplifies the implementation of a phase-locked loop.
Each of the functional blocks (shown in the Functional
Diagram is described in detail in the following sec-
tions.
Loc al Osc illator
The local-oscillator section is formed by an emitter-cou-
pled differential pair. Figure 1 shows the equivalent
local-oscillator circuit schematic. An external LC reso-
nant tank determines the oscillation frequency, and the
Q of this resonant tank determines the phase noise of
the oscillator. The oscillation frequency is twice the IF
frequency, so that the quadrature phase generator can
use two latches to generate precise quadrature signals.
Quadrature Phase Generator
The quadrature phase generator uses two latches to
divide the local-oscillator frequency by two, and gener-
ates two precise quadrature signals. Internal limiting
amplifiers shape the signals to approximate square
waves to drive the Gilbert-cell mixers in the modulator.
The inphase signal (at half the local-oscillator frequen-
cy) is further divided by four for an external phase-
locked loop.
Modulator
The modulator accepts up to 1.35Vp-p I and Q differen-
tial baseband signals up to 15MHz, and upconverts
them to higher-frequency IF signals. Since these inputs
are biased internally at around 1.5V, you can improve
carrier suppression by externally capacitively coupling
the signals into these high-impedance ports (the differ-
ential input impedance is approximately 44k
). The
self-bias design is for very low on-chip offset, resulting
in excellent carrier suppression. The IF output is
designed to drive a high impedance (>20k
), such as
an IF buffer or an upconverter mixer.
Presc aler
The prescaler output, PRE_OUT, is buffered and
swings typically 0.35Vp-p with a 10k
and 6pF load. It
can be AC-coupled to the input of a frequency synthe-
sizer.
Master Bias
During normal operation, ENABLE should remain above
V
CC
- 0.4V. Pulling the ENABLE input low shuts off the
master bias and reduces the circuit current to 2μA. The
master bias section includes a bandgap reference
generator and a PTAT (Proportional To Absolute
Temperature) current generator.
TANK
TANK
Q1
Q2
Q3
Q4
R
L
5k
R
L
5k
L0_V
CC
TO
DIVIDE-BY-2
Figure 1. Local-Oscillator Equivalent Circuit
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