
M
LF-to-2.5GHz Dual Logarithmic Detector/
Controller for Power, Gain, and VSWR Measurements
______________________________________________________________________________________
15
OUTA and OUTB Slope Adjustment
The transfer slope function of OUTA and OUTB can be
increased from its nominal value by varying resistors
R1 and R2 (see the
Typical Application Circuit
). The
equation controlling the slope is:
OUTD Slope Adjustment
The transfer slope function of OUTD can be increased
from its nominal value by varying resistor R3 (see the
Typical Application Circuit
). The equation controlling
the slope is:
Input Highpass Filters
The MAX2016 integrates a programmable highpass fil-
ter on each RF input. The lower cutoff frequency of the
MAX2016 can be decreased by increasing the external
capacitor value between FA1 and FA2 or FB1 and FB2.
By default, with no capacitor connecting FA1 and FA2
or FB1 and FB2, the lower cutoff frequency is 20MHz.
Using the following equation determines the lowest
operating frequency:
where R = 2
.
Differential Output Video Filter
The bandwidth and response time difference of the output
amplifier can be controlled with the external capacitor,
C
15
, connected between FV1 and FV2. With no external
capacitor, the bandwidth is greater than 20MHz.
The following equation determines the bandwidth of the
amplifier difference:
where R = 1.8k
.
Comparators/Window Detectors
The MAX2016 integrates two comparators for use in
monitoring the difference in power levels (gain) of
RFINA and RFINB. The thresholds of the comparators
are set to the voltage applied to CSETL and CSETH.
The lower comparator (CSETL, COUTL) monitors the
minimum gain while the upper comparator (CSETH,
COUTH) monitors the maximum gain. See the window
detector shown in Figure 8. The outputs of each com-
parator can be monitored independently or from the
COR output, which ORs the outputs of each compara-
tor making a window detector. If the difference between
the two RF input powers (gain) are within the set range,
COR is a logic 0. If the gain of the RF inputs is too high
or too low, the COR output is a logic 1.
These comparators can be used to trigger hardware inter-
rupts allowing rapid detection of overrange conditions.
Power-Supply Connection
The MAX2016 is designed to operate from a single
+2.7V to +3.6V supply. To operate under a higher sup-
ply voltage range, a resistor must be connected in series
with the power supply and V
CC
to reduce the voltage
delivered to the chip. For a +4.75V to +5.25V supply,
use a 37.4
(±1%) resistor in series with the supply.
Layout Considerations
A properly designed PC board is an essential part of
any RF/microwave circuit. Keep RF signal lines as short
frequency
RC
=
1
2
π
frequency
RC
=
1
2
π
SLOPEOUTD
mV
dB
R
k
k
=
25
3 20
20
SLOPEOUTA OROUTB
mV
dB
R orR
(
k
k
=
)
+
9
1
2
40
20
MAX2016
LOGARITHMIC
DETECTOR
TRANSMITTER
SET-POINT
DAC
OUTA/
OUTB
SETA/
SETB
COUPLER
RFINA/
RFINB
POWER AMPLIFIER
GAIN-CONTROL INPUT
20k
20k
Figure 7. In Power-Controller Mode, the DC Voltage at OUTA or
OUTB Controls the Gain of the PA, Leading to a Constant
Output Power Level (
Note:
Only one controller channel is
shown within the figure. Since the MAX2016 is a dual con-
troller/detector, the second channel can be easily implemented
by using the adjacent set of input and output connections.)