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參數(shù)資料
| 型號： | MAX19794ETX+ |
| 廠商： | Maxim Integrated |
| 文件頁數(shù)： | 19/25頁 |
| 文件大小： | 5676K |
| 描述： | ATTENUATR 46DB 50OHM 4GHZ 36TQFN |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 衰減值： | 0dB ~ 46.4dB |
| 頻率范圍： | 500MHz ~ 4GHz |
| 阻抗： | 50 歐姆 |
| 封裝/外殼： | 36-WFQFN 裸露焊盤 |
19
MAX19794
10MHz to 500MHz Dual Analog Voltage Variable
Attenuator with On-Chip 10-Bit SPI-Controlled DAC
is enabled and a voltage is also applied to CTRL (pin
11). The on-chip switches are set to compare the DAC
voltage to the CTRL voltage at the comparator input, and
the output of the comparator COMP_OUT trips from high
to low when the CTRL exceeds the on-chip DAC voltage.
DAC Test Mode
In Table 1 state (1, 1), the attenuators are controlled by
the on chip 10-bit DAC register. See Register MODE UP/
DWN Operation section. In this condition, the DAC is
enabled and the DAC voltage appears at the CTRL pin.
In this condition, no signal can be applied to the CTRL
pin and the load on the CTRL pin should be > 100kI.
This mode is used only in production testing of the DAC
voltage and is not recommended for customer use.
Register MODE UP/DWN Operation
The device uses four 13-bit registers for the operation of
the device. The first bit is the read/write bit,the following
two are address bits, while the remaining 10 are the
desired data bits. The read/write bit determines whether
the register is being written to or read from. The next two
address bits select the desired register to write or read
from. These address bits can be seen in Table 2. Table 3
describes the contents of the four registers.
Figure 1 shows the configuration of the internal registers
of the device, and Figure 2 shows the timing of the
SPI bus. Register 0 is used to set the DAC code to the
desired value, register 1 selects the step-up code, and
register 2 selects the step-down code.
The part also contains a MODE control pin (Table 4),
along with UP and DWN controls(Table 5). When MODE
is 0, the contents of register 0 get loaded into the 10-bit
DAC register and set the value of the on-chip DAC. In this
condition, the UP and DWN control pins have no effect on
the part. In MODE 1, the effective DAC code fed to the
10-bit DAC register is equal to:
m x Register 1 - n x Register 2
where m and n are the number of UP and DWN control
steps accumulated, respectively.
After powering up the part, UP and DWN should both
be set to 0 to reset the m and n counters to be 0. This
results in a 10-bit all 0 code out of the mathematical block
in Figure 1. This is applied to the 10-bit DAC register that
drives the DAC. To increase (decrease) the code using
the UP (DWN) pin, the DWN (UP) pin must be high and
the UP (DWN) pin should be pulsed low to high. The part
is designed to produce no wraparounds when using UP
and DWN stepping, so the DAC code maxes out at 1023
or goes no lower than 0. See Figure 3 for the UP and
DWN control operation.
Switching back to MODE 0 produces the same 10-bit DAC
code as was previously loaded into register 0. Switching
back to MODE = 1 results in the previous 10-bit DAC code
from the register 1 and 2 combiner/multiplier block.
Register 3 is used to set the RDBK_EN register in the
write mode and is used to read back the RDBK_EN
register and COMP_OUT in the read mode.
SPI Interface
The device can be controlled with a 4-wire SPI-compatible
serial interface. Figure 2 shows a timing diagram for the
interface. In the write mode, a 13-bit word is loaded into
the device through the DIN pin with CS set low. The first
bit of the word in the write mode is 0, and the next two
bits select the register to be written to. See Table 2. The
next 10 bits contain the data to be written to the selected
register. After the 13 bits are shifted in, a low to high CS
command is applied and this latches the 10 bits into the
selected register. The entire write command is ignored
if CS is pulsed low to high before the last data bit is
successfully captured.
For the read cycle, the first bit clocked in is a 1 and this
establishes that a register is to be read. The next two
clocked bits form the address of the register to be read.
See Table 2. In this read mode, data starts to get clocked
out of the DOUT pin after A0 is captured. The DOUT
pin goes to a high-impedance state after the 10 bits are
transmitted, or if CS goes high at any point in time during
the transmission.
Voltage Reference
The device has an on-chip voltage reference for the
DAC and also has a provision to operate with an off-
chip reference. Table 6 provides details in selecting the
desired reference.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX19794ETX+ | 功能描述:衰減器 -IC 10MHz to 500MHz Attenuator RoHS:否 制造商:Skyworks Solutions, Inc. 最大衰減:18 dB 容差: 阻抗: 功率額定值:30 dBm 安裝風(fēng)格:SMD/SMT 工作溫度范圍:- 40 C to + 85 C |
| MAX19794ETX+T | 功能描述:衰減器 -IC 10MHz to 500MHz Attenuator RoHS:否 制造商:Skyworks Solutions, Inc. 最大衰減:18 dB 容差: 阻抗: 功率額定值:30 dBm 安裝風(fēng)格:SMD/SMT 工作溫度范圍:- 40 C to + 85 C |
| MAX1979ETM | 功能描述:電壓模式 PWM 控制器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| MAX1979ETM+ | 功能描述:電壓模式 PWM 控制器 Integrated Temp Ctlr for Peltier Modules RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| MAX1979ETM+T | 功能描述:電壓模式 PWM 控制器 Integrated Temp Ctlr for Peltier Modules RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
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