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參數(shù)資料
| 型號： | MAX19707ETM+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 37/37頁 |
| 文件大小： | 0K |
| 描述： | IC ANLG FRNT END 48-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 10 |
| 通道數(shù)： | 4 |
| 功率（瓦特）： | 84.6mW |
| 電壓 - 電源，模擬： | 3V |
| 電壓 - 電源，數(shù)字： | 3V |
| 封裝/外殼： | 48-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-TQFN-EP（7x7） |
| 包裝： | 帶卷 (TR) |
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MAX19707
10-Bit, 45Msps, Ultra-Low-Power
Analog Front-End
_______________________________________________________________________________________
9
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3V, OVDD = 1.8V, internal reference (1.024V), CL
≈ 10pF on all digital outputs, fCLK = 45MHz (50% duty cycle), Rx ADC input
amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, differential Rx ADC input, differential Tx DAC output, CREFP = CREFN =
CCOM = 0.33F, unless otherwise noted. CL < 5pF on all aux-DAC outputs. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS (CLK, SCLK, DIN,
CS, D0–D9, T/R, SHDN)
Input High Threshold
VINH
0.7 x OVDD
V
Input Low Threshold
VINL
0.3 x OVDD
V
Input Leakage
DIIN
D0–D9, CLK, SCLK, DIN,
CS, T/R,
SHDN = OGND or OVDD
-1
+1
A
Input Capacitance
DCIN
5pF
DIGITAL OUTPUTS (D0–D9, DOUT)
Output-Voltage Low
VOL
ISINK = 200A
0.2 x OVDD
V
Output-Voltage High
VOH
ISOURCE = 200A
0.8 x OVDD
V
Tri-State Leakage Current
ILEAK
-1
+1
A
Tri-State Output Capacitance
COUT
5pF
Note 1: Specifications from TA = +25°C to +85°C are guaranteed by production tests. Specifications from TA = +25°C to -40°C are
guaranteed by design and characterization.
Note 2: The minimum clock frequency (fCLK) for the MAX19707 is 7.5MHz (typical). The minimum aux-ADC sample rate clock fre-
quency (ACLK) is determined by fCLK and the chosen aux-ADC clock-divider value. The minimum aux-ADC ACLK >
7.5MHz / 128 = 58.6kHz. The aux-ADC conversion time does not include the time to clock the serial data out of the SPI.
The maximum conversion time (for no averaging, NAVG = 1) will be, tCONV (max) = (12 x 1 x 128) / 7.5MHz = 205s.
Note 3: SNR, SINAD, SFDR, HD3, and THD are based on a differential analog input voltage of -0.5dBFS referenced to the amplitude
of the digital outputs. SINAD and THD are calculated using HD2 through HD6.
Note 4: Crosstalk rejection is measured by applying a high-frequency test tone to one channel and a low-frequency tone to the second
channel. FFTs are performed on each channel. The parameter is specified as the power ratio of the first and second channel
FFT test tone.
Note 5: Amplitude and phase matching is measured by applying the same signal to each channel, and comparing the two output
signals using a sine-wave fit.
Note 6: Guaranteed by design and characterization.
SPI is a trademark of Motorola, Inc.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX19707EVCMOD2 | 功能描述:ADC / DAC多通道 Evaluation System for the MAX19707 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX19707EVCMODU | 功能描述:ADC / DAC多通道 Evaluation System for the MAX19707 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX19707EVKIT | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 Evaluation Kit for the MAX19705 MAX19706 MAX19707 MAX19708 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX19708ETM | 功能描述:ADC / DAC多通道 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| MAX19708ETM+ | 功能描述:ADC / DAC多通道 11Msps CODEC/AFE 1.8/2.7-3.3V RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40 |
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