參數(shù)資料
型號(hào): MAX1932
廠商: Maxim Integrated Products, Inc.
英文描述: Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply
中文描述: 數(shù)控、0.5%精度、更安全的APD偏置電源
文件頁(yè)數(shù): 6/16頁(yè)
文件大?。?/td> 399K
代理商: MAX1932
M
Detailed Description
Fixed Frequency PWM
The MAX1932 uses a constant frequency, PWM, con-
troller architecture. This controller sets the switch on-
time and drives an external N-channel MOSFET (see
Figure 1). As the load varies, the error amplifier sets the
inductor peak current necessary to supply the load and
regulate the output voltage.
Output Current Limit
The MAX1932 uses an external resistor at CS+ and CS-
to sense the output current (see Figure 2). The typical
current-limit threshold is 2V.
CL
is designed to help find
the optimum APD bias point by going low to indicate
when the APD reaches avalanche and that current limit
has been activated. To minimize noise,
CL
only
changes state on an internal oscillator edge.
Output Control DAC
An internal digital-to-analog converter can be used to
control the output voltage of the DC-DC converter
(Figure 2). The DAC output is changed through an SPI
serial interface using an 8-bit control byte. On power-up,
the DAC defaults to FF hex (1.25V), which corresponds
to a minimum boost converter output voltage.
Alternately, the output voltage can be set with external
resistors, an external DAC, or a voltage source. Output
span and offset are independently settable with exter-
nal resistors. See the
Applications Information
section
for output control equations.
SPI Interface/Shutdown
Use an SPI-compatible 3-wire serial interface with the
MAX1932 to control the DAC output voltage and to shut
down the MAX1932. Figures 4 and 5 show timing diagrams
for the SPI protocol. The MAX1932 is a write-only device
and uses
CS
along with SCLK and DIN to communicate.
The serial port is always operational when the device is
powered. To shut down the DC-DC converter portion only,
update the DAC registers to 00 hex.
Applications Information
Voltage Feedback Sense Point
Feedback can be taken from in front of, or after, the cur-
rent-limit sense resistor. The current-limit sense resistor
forms a lowpass filter with the output capacitor. Taking
feedback after the current-limit sense resistor (see Figure
2), optimizes the output voltage accuracy, but requires
overcompensation, which slows down the control loop
response. For faster response, the feedback can be
taken from in front of the current-sense resistor (see
Figure 3). This configuration however, makes the output
voltage more sensitive to load variation and degrades
output accuracy by an amount equal to the load current
times the current-sense resistor value.
Digitally Controlled, 0.5% Accurate, Safest APD
Bias Supply
6
_______________________________________________________________________________________
Pin Description
PIN
1
2
3
NAME
SCLK
DIN
CL
FUNCTION
DAC Serial Clock Input
DAC Serial Data Input
Current-Limit Indicator Flag.
CL
= 0 indicates that the part is in current limit. Logic high level = VIN.
4
CS+
Current-Limit Plus Sense Input. Connect a resistor from CS+ to CS- in series with the output. The differential
threshold is 2V. CS+ has typically 1M
resistance to ground.
Current-Limit Minus Sense Input. CS- has typically 1M
resistance to ground.
5
CS-
6
DACOUT
Internal DAC Output. Generates a control voltage for adjustable output operation. DACOUT can source or
sink 50μA.
7
FB
Feedback input. Connect to a resistive voltage-divider between the output voltage (V
OUT
) and FB to set the
output voltage. The feedback set point is 1.25V.
8
COMP
Compensation Pin. Compensates the DC-DC converter control loop with a series RC to GND. COMP is
actively discharged to ground during shutdown or undervoltage conditions.
9
10
11
12
GND
GATE
VIN
CS
Ground
Gate-Driver Output for External N-FET
IC Supply Voltage (2.7V to 5.5V). Bypass VIN with a 1μF or greater ceramic capacitor.
DAC Chip-Select Input
SPI is a trademark of Motorola, Inc.
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