
MAX187/MAX189
+5V, Low-Power, 12-Bit Serial ADCs
11
Maxim Integrated
Figure 8. MAX187/MAX189 Interface Timing Sequence
Figure 9. MAX187/MAX189 Detailed Serial-Interface Timing
CS
SCLK
DOUT
INTERFACE IDLE
CONVERSION
IN PROGRESS
EOC
A/D
STATE
TRACK
CONVERSION
0
TRAILING
ZEROS
IDLE
0.5s
(tCS)
TOTAL = 12.25s
CONV. 1
CLOCK OUTPUT DATA
TRACK
12 x 0.250s = 3.25s
B11 B10 B9 B8
B7
B6 B5
B4
B3
B2
B1
B0
14
812
MINIMUM
CYCLE TIME
8.5s
(tCONV)
0s
EOC
0s
CS
SCLK
DOUT
INTERNAL
T/H
(TRACK)
tCS0
tDV
tAPR
(HOLD)
(TRACK)
B2
B1
B0
tCH
tDO
tCL
tTR
tCONV
tCS