參數(shù)資料
型號(hào): MAX1888
廠商: Maxim Integrated Products, Inc.
英文描述: Low-Cost Integrated Offset Logic for Notebook CPU Power Supplies
中文描述: 低成本、用于筆記本電腦CPU電源電壓偏差調(diào)節(jié)的邏輯控制器
文件頁(yè)數(shù): 6/7頁(yè)
文件大小: 412K
代理商: MAX1888
M
Low-Cost Integrated Offset Logic for Notebook
CPU Power Supplies
6
_______________________________________________________________________________________
Supply Current
The MAX1888 needs no shutdown control. The circuit
consumes virtually no current (I(V
CC
) < 1μA) when all
the logic inputs are 0V, and less than 30μA when all the
logic inputs are 1.5V. In general, the supply current
increases with supply voltage and decreases with the
logic input voltage. For a given supply voltage, the sup-
ply current decreases with temperature (see the
Typical Operating Characteristics
).
Applications Information
Figure 2 shows a typical CPU core supply application
using the MAX1888 and the MAX1718. The voltage
dividers are set to obtain negative offsets of 1%, 3%,
and 5% of the output voltage for battery-operating
mode (BOM), battery sleep mode (BSM), and perfor-
mance sleep mode (PSM), respectively. The offset volt-
age is given by the following equation:
POS
where K is the DAC code-dependent scale factor (refer
to Table 3 in the MAX1718 data sheet). The offset volt-
age in each mode is:
Note that divider ratio in each mode must be adjusted
for a given DAC code. The circuit in Figure 2 assumes
V
OUT
= 1V with K = 0.84 and R10 = 1k
. The resulting
values for R11, R12, R13 in the divider are 26.7k
,
15.8k
, and 82.5k
, respectively. Please note that
these offsets are provided as an example only. Contact
Intel for specific offset requirements.
The circuits in Figures 1 and 2 set the offset voltage as
a percentage of the output voltage. Alternatively, the
offset can be set as independent of the output voltage
by biasing the POS and NEG inputs from a fixed refer-
ence voltage (see Figure 3).
The MAX1888 can be inserted in the feedback path of
any regulator to offset the output voltage. An external
reference greater than the feedback set point is need-
ed to affect negative offsets. The basic arrangement is
shown in Figure 4.
V
V
V
OFFSET,BOM
OFFSET,BSM
OFFSET,P M
=
+
=
+
=
+
K
R
R
R
V
K
R
R
R
V
K
R
R
R
V
OUT
OUT
OUT
10
10
13
10
10
11
10
10
12
V
OFFSET
=
)
K V
V
NEG
Figure 3. Using the MAX1888 to Set the Offset Voltage
Independent of V
OUT
OPEN-DRAIN
DECODER
OUTPUTS
TO
MAX1718
POS
NEG
5V INPUT
V
REF
PERF
SUS
V
CC
GND
MAX1888
BSM
PSM
BOM
LOW-
VOLTAGE
LOGIC
INPUTS
DPSLP
Figure 4. Inserting the MAX1888 into the Feedback Path of Any
Regulator to Shift Output Voltage
OPEN-DRAIN
DECODER
OUTPUTS
V
FB
LOW-
VOLTAGE
LOGIC
INPUTS
5V INPUT
V
REF
V
OUT
PERF
SUS
V
CC
GND
MAX1888
BSM
PSM
BOM
DPSLP
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