
M
Quick-PWM Slave Controllers for
Multiphase, Step-Down Supplies
______________________________________________________________________________________
17
There also is a negative current limit that prevents
excessive reverse inductor currents when V
OUT
is sink-
ing current. The negative current-limit threshold is set to
approximately 150% of the positive current-limit thresh-
old, and tracks the positive current limit when ILIM is
adjusted.
The MAX1887/MAX1897 uses CS+ and CS- to differen-
tially measure the current across an external sense
resistor (R
CS
) connected between the inductor and out-
put capacitors. This configuration provides precise cur-
rent balancing, current limiting, and voltage positioning
with a 1% current-sense resistor. Reducing the sense
voltage decreases power dissipation but increases the
relative measurement error.
Carefully observe the PC board layout guidelines to
ensure that noise and DC errors don
’
t corrupt the current-
sense signals measured at CS+ and CS-. The IC should
be mounted relatively close to the current-sense resistor
with short, direct traces making a Kelvin sense connec-
tion.
Master Current-Limit Adjustment (LIMIT)
The Quick-PWM controllers that may be used as the
master controller typically use the low-side MOSFET
’
s
on-resistance as its current-sense element. This depen-
dence on a loosely specified resistance with a large
temperature coefficient causes inaccurate current limit-
ing. As a result, high current-limit thresholds are need-
ed to guarantee full-load operation under worst-case
conditions. Furthermore, the inaccurate current limit
mandates the use of MOSFETs and inductors with
excessively high current and power dissipation ratings.
The slave includes a precision current-limit comparator
that supplements the master
’
s current-limit circuitry.
The MAX1887/MAX1897 uses CM+ and CM- to differ-
entially sense the master
’
s inductor current across a
current-sense resistor, providing a more accurate cur-
rent limit. When the master
’
s current-sense voltage
exceeds the current limit set by ILIM in the slave (see
the
Dual-Mode ILIM Input
section), the open-drain cur-
rent-limit comparator pulls LIMIT low (Figure 2). Once
the master triggers the current limit, a pulse-width mod-
ulated output signal appears at LIMIT. This signal is fil-
tered and used to adjust the master
’
s current-limit
threshold.
High-Side, Gate Driver Supply (BST)
The gate drive voltage for the high-side, N-channel
MOSFET is generated by the flying capacitor boost cir-
cuit (Figure 4). The capacitor between BST and LX is
alternately charged from the external 5V bias supply
(V
DD
) and placed in parallel with the high-side MOSFET
’
s
gate-source terminals.
On startup, the synchronous rectifier (low-side MOSFET)
forces LX to ground and charges the boost capacitor to
5V. On the second half of each cycle, the switch-mode
power supply turns on the high-side MOSFET by closing
an internal switch between BST and DH. This provides
the necessary gate-to-source voltage to turn on the high-
side switch, an action that boosts the 5V gate drive signal
above the system
’
s main supply voltage (V+).
I
I
LIMIT(VALLEY)
= I
LOAD(MAX)
2 - LIR
2
η
(
)
TIME
0
I
PEAK
I
LOAD
I
LIMIT
MAX1887
MAX1897
V+
BST
DH
LX
(R
BST
)*
D
BST
C
BST
C
BYP
INPUT
(V
IN
)
N
H
L
( )* OPTIONAL–THE RESISTOR REDUCES
THE SWITCHING-NODE RISE TIME.
Figure 3.
“
Valley
”
Current-Limit Threshold Point
Figure 4. High-Side Gate Driver Boost Circuitry