參數(shù)資料
型號(hào): MAX1885EUP
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 穩(wěn)壓器
英文描述: Fixed-Point Digital Signal Processor 256-BGA
中文描述: 2.05 A SWITCHING REGULATOR, 625 kHz SWITCHING FREQ-MAX, PDSO20
封裝: 4.40 MM, 1.10 MM HEIGHT, MO-153AC, TSSOP-20
文件頁數(shù): 4/38頁
文件大?。?/td> 1051K
代理商: MAX1885EUP
M
Quad-Output TFT LCD DC-DC
Converters with Buffer
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= +3.0V,
SHDN
= IN, V
SUPP
= V
SUPN
= V
SUPB
= V
SUPL
= 10V, LDOOUT = FBL, BUF- = BUFOUT, BUF+ = FLTSET = TGND =
PGND = GND, C
REF
= 0.22μF, C
BUF
= 1μF,
T
A
= 0
°
C to +85
°
C
. Typical values are at T
A
= +25
°
C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NEGATIVE CHARGE PUMP (MAX1778/MAX1880/MAX1881/MAX1882 ONLY)
SUPN Input Supply Range
V
SUPN
Operating Frequency
f
CHP
FBN Regulation Voltage
V
FBN
FBN Input Bias Current
I
FBN
DRVN PCH On-Resistance
R
PCH(ON)
2.7
13
V
Hz
mV
nA
0.5 x f
OSC
0
-50
-50
+50
+50
10
4
V
FBN
= 0
5
2
k
A
mV
mV
V
FBN
= +50mV
V
FBN
= -50mV
DRVN NCH On-Resistance
R
NCH(ON)
20
Maximum RMS DRVN Current
FBN Power-Ready Trip Level
FBN Fault Trip Level
LOW-DROPOUT LINEAR REGULATOR (MAX1778/MAX1881/MAX1883/MAX1884 ONLY)
SUPL Input Supply Range
V
SUPL
SUPL Undervoltage Lockout
SUPL Quiescent Current
I
SUPL
0.1
125
140
Falling edge
Rising edge
80
80
165
190
4.5
3.8
15
4.3
220
300
V
V
μA
Rising edge, 50mV hysteresis (typ)
I
LDO
= 100μA
LDO is set to
regulate at 9V
4
120
130
70
I
LDO
= 40mA
I
LDO
= 5mA
Dropout Voltage (Note 1)
V
DROP
mV
FBL Regulation Voltage
V
FBL
V
SUPL
= 10V, LDO regulating at 9V,
I
LDO
= 15mA
1.235
1.25
1.265
V
LDO Load Regulation
V
SUPL
= 10V, LDO regulating at 9V,
I
LDO
= 100μA to 40mA
1.2
%
LDO Line Regulation
V
SUPL
= 4.5V to 15V, FBL = LDOOUT,
I
LDO
= 15mA
V
FBL
= 1.25V
V
SUPL
= 10V, V
LDOOUT
= 9V, V
FBL
= 1.2V
0.02
%/V
FBL Input Bias Current
LDO Current Limit
VCOM BUFFER
SUPB Input Supply Range
SUPB Quiescent Current
BUFOUT Leakage Current
Power-Supply Rejection Ratio
I
FBL
I
LDOLIM
-0.8
40
+0.8
220
μA
mA
130
V
SUPB
I
SUPB
4.5
13
850
+10
V
μA
μA
dB
V
V
SUPB
= 13V
420
-10
85
PSRR
V
SUPB
= 4.5V to 13V, V
CM
= 2.25V
98
Input Common-Mode Voltage
Range
V
CM
|V
OS
| < 10mV
1.2
8.8
Common-Mode Rejection Ratio
Input Bias Current
Input Offset Current
Gain Bandwidth Product
CMRR
I
BIAS
I
OS
GBW
V
CM
= 1.2V to 8.8V
V
CM
= 5V
V
CM
= 5V
C
BUF
= 1μF
75
-100
-100
dB
nA
nA
kHz
-10
+100
+100
13
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