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參數(shù)資料
| 型號(hào)： | MAX1864-MAX1865 |
| 廠商： | Maxim Integrated Products, Inc. |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | Fixed-Point Digital Signal Processor 384-FC/CSP |
| 中文描述： | 的xDSL /電纜調(diào)制解調(diào)器的三/五級(jí)輸出電源 |
| 文件頁數(shù)： | 16/25頁 |
| 文件大?。?/td> | 384K |
| 代理商： | MAX1864-MAX1865 |
M
xDSL/Cable Modem Triple/Quintuple Output
Power Supplies
16
______________________________________________________________________________________
MOSFET Selection
The MAX1864/MAX1865s
’
step-down controller drives
two external logic-level N-channel MOSFETs as the cir-
cuit switch elements. The key selection parameters are:
On-resistance (R
DS(ON)
)
Maximum drain-to-source voltage (V
DS(MAX)
)
Minimum threshold voltage (V
TH(MIN)
)
Total gate charge (Q
g
)
Reverse transfer capacitance (C
RSS
)
The high-side N-channel MOSFET must be a logic-level
type with guaranteed on-resistance specifications at
V
GS
≤
4.5V. Select the high-side MOSFET
’
s R
DS(ON)
so
I
PEAK
x R
DS(ON)
≤
225mV for the current-sense range.
For maximum efficiency, choose a high-side MOSFET
(N
H
) that has conduction losses equal to the switching
losses at the optimum input voltage. Check to ensure
that the conduction losses at minimum input voltage
don
’
t exceed the package thermal limits or violate the
overall thermal budget. Check to ensure that the con-
duction losses plus switching losses at the maximum
input voltage don
’
t exceed package ratings or violate
the overall thermal budget.
The low-side MOSFET (N
L
) provides the current-limit
signal, so choose a MOSFET with an R
DS(ON)
large
enough to provide adequate circuit protection (see
Setting the Current-Limit
):
Use the worst-case maximum value for R
DS(ON)
from
the MOSFET N
L
data sheet, and add some margin for
the rise in R
DS(ON)
over temperature. A good general
rule is to allow 0.5% additional resistance for each
°
C of
the MOSFET junction temperature rise. Ensure that the
MAX1864/MAX1865 DL gate drivers can drive N
L
; in
other words, check that the dv/dt caused by N
H
turning
on does not pull up the N
L
gate due to drain-to-gate
capacitance, causing cross-conduction problems.
MOSFET package power dissipation often becomes a
dominant design factor. I
2
R power losses are the great-
est heat contributor for both high-side and low-side
MOSFETs. I
2
R losses are distributed between N
H
and
N
L
according to duty factor as shown in the equations
below. Generally, switching losses affect only the high-
side MOSFET since the low-side MOSFET is a zero-volt-
age switched device when used in the buck topology.
Gate-charge losses are dissipated by the driver and do
not heat the MOSFET. Calculate the temperature rise
according to package thermal-resistance specifications
to ensure that both MOSFETs are within their maximum
junction temperature at high ambient temperature. The
worst-case dissipation for the high-side MOSFET (P
NH
)
occurs at both extremes of input voltage, and the
worst-case dissipation for the low-side MOSFET (P
NL
)
occurs at maximum input voltage.
where I
GATE
is the DH driver peak output current capa-
bility (1A typ), and 20ns is the DH driver inherent
rise/fall-time. To reduce EMI caused by switching
noise, add a 0.1μF ceramic capacitor from the high-
side switch drain to the low-side switch source, or add
resistors (47
max) in series with DL and DH to
increase the switches
’
turn-on and turn-off times (Figure
5).
The minimum load current should exceed the high-side
MOSFET
’
s maximum leakage current over temperature
if fault conditions are expected.
Input Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit
’
s switching.
The input capacitor must meet the ripple current
requirement (I
RMS
) imposed by the switching currents
defined by the following equation:
For most applications, nontantalum capacitors (ceram-
ic, aluminum, polymer, or OS-CON) are preferred due
to their robustness with high inrush currents typical of
systems with low-impedance battery inputs.
Additionally, two (or more) smaller value low-ESR
capacitors can be connected in parallel for lower cost.
Choose an input capacitor that exhibits less than
+10
°
C temperature rise at the RMS input current for
optimal circuit long-term reliability.
I
I
V
V
V
V
RMS
LOAD
OUT
IN
OUT
IN
=
(
)
-
Duty Cycle
D
V
V
P
V I
V C
I
GATE
P
P
I
R
D
P
P
P
I
R
D
OUT
IN
NH SWITCHING
(
NH CONDUCTION
(
LOAD
DS ON NH
(
+
NH TOTAL
(
NH SWITCHING
(
NH CONDUCTION
(
NL
LOAD
DS ON NL
(
:
)
)
)
)
)
)
)
=
=
=
=
=
(
)
2
2
1 -
R
V
I
DS ON
(
VALLEY
VALLEY
)
=
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