All level translation is valid for DVCC ≥ VCC <" />
參數(shù)資料
型號: MAX1740EUB+T
廠商: Maxim Integrated Products
文件頁數(shù): 11/12頁
文件大?。?/td> 0K
描述: IC TRANSLATOR LEVEL 10-UMAX
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
應用: 智能卡
接口: MICROWIRE?,QSPI?,串行,SPI?
電源電壓: 1.43 V ~ 5.5 V,2.25 V ~ 5.5 V
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應商設(shè)備封裝: 10-µMAX
包裝: 帶卷 (TR)
安裝類型: 表面貼裝
MAX1740/MAX1741
All level translation is valid for DVCC
≥ VCC or DVCC
VCC. The MAX1740/MAX1741 contain internal pull-up
resistors from DATA to the controller-side supply
(DVCC) and from IO to the card-side supply (VCC). For
push-pull controller outputs, see the Data Driver section
for bidirectional data translation.
Data Driver (MAX1741 only)
When using a microcontroller (C) without an open-drain
output, use the data driver (DDRV) input to send data to
the SIM/smart card, while DATA provides the controller-
side output for bidirectional data transfer. When not
used, connect DDRV to DVCC to reduce total supply cur-
rent.
Shutdown Mode
For the MAX1740, drive SHDN low to activate shut-
down. Connect SHDN to DVCC or drive high for normal
operation. To allow for card insertion and removal, shut-
down mode actively pulls CLK, RST, and IO low; it also
disconnects the internal 10k
pull-up resistor from VCC
to prevent excessive current draw. Shutdown mode
reduces the total supply current (IDVCC + IVCC) to
0.01A.
SIM/Smart Card Insertion/Removal
The SIM/smart card specifications require that the
card-side pins (VCC, CLK, RST, IO) be at ground
potential prior to inserting the SIM/smart card. For
applications using the MAX1686H (Figure 4), the easi-
est way to achieve this is by shutting down the
MAX1686H or by driving SHDN (MAX1740 only) low. If
specific sequencing is desired, pull IO low by driving
either DATA or DDRV (MAX1741 only) low, and pull
CLK and RST low by driving CIN and RIN low, respec-
tively.
ESD Protection
As with all Maxim devices, ESD-protection structures
on all pins protect against electrostatic discharges
(ESDs) encountered during handling and assembly.
For further protection during card insertion and
removal, the pins that connect to the card socket (CLK,
RST, IO, VCC, and GND) provide protection against
±10kV of ESD, according to the Human Body Model.
The ESD structures withstand high ESD in all states:
normal operation, shutdown, and power-down. After an
ESD event, the MAX1740/MAX1741 continue working
without latchup.
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report documenting test
setup, test methodology, and test results.
Human Body Model
Figure 3a shows the Human Body Model, and Figure
3b shows the current waveform it generates when dis-
charged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of inter-
SIM/Smart Card Level Translators
in MAX
8
_______________________________________________________________________________________
Figure 2. Typical Application Circuit and Functional Diagram
VCC
SIM OR
SMART CARD
SYSTEM
CONTROLLER
CLK
RST
1
F
GND
CLK
RST
GND
VCC
DVCC
MAX1740
MAX1741
SHDN*
OPTIONAL
RIN
CIN
20k
10k
OPTIONAL
DATA
DDRV*
SHDN FOR MAX1740 ONLY
DDRV FOR MAX1741 ONLY
*
SHUTDOWN
CONTROL
IO
1
F
DVCC
VCC
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