
M
High-S peed S tep-Down Controller with
S ync hronous Rec tific ation for CPU Power
10
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S ync hronous-Rec tifier Driver
Synchronous rectification reduces conduction losses in
the rectifier by shunting the normal Schottky diode or
MOSFET body diode with a low-on-resistance MOSFET
switch. The synchronous rectifier also ensures proper
start-up by precharging the boost-charge pump used
for the high-side switch gate-drive circuit. Thus, if you
must omit the synchronous power MOSFET for cost or
other reasons, replace it with a small-signal MOSFET,
such as a 2N7002.
The DL drive waveform is simply the complement of
the DH high-side drive waveform (with typical con-
trolled dead time of 30ns to prevent cross-conduction
or shoot-through). The DL output’s on-resistance is
0.7
(typ) and 2
(max).
BS T High-S ide Gate-Driver S upply
and MOS FET Drivers
Gate-drive voltage for the high-side N-channel switch
is generated using a flying-capacitor boost circuit
(Figure 3). The capacitor is alternately charged from
the +5V supply and placed in parallel with the high-
side MOSFET’s gate and source terminals.
Gate-drive resistors (R3 and R4) can often be useful to
reduce jitter in the switching waveforms by slowing
down the fast-slewing LX node and reducing ground
bounce at the controller IC. However, switching loss
may increase. Low-value resistors from around 1
to
5
are sufficient for many applications.
Glitc hCatc her
Current-Boost Driver
Drivers for an optional GlitchCatcher current-boost cir-
cuit are included in the MAX1638 to improve transient
response in applications where several amperes of
load current are required in a matter of a few tens of
nanoseconds. The GlitchCatcher can be used to offset
the fast drop in output voltage due to the ESR of the
output capacitance. The current-boost circuit improves
transient response by providing a direct path from the
input to the output that circumvents the buck inductor’s
filtering action. When the output drops out of regulation
by more than 2%, the P-channel or N-channel switch
turns on and injects current directly into the output from
V
IN
or ground, forcing the output back into regulation.
The driver’s response time is typically 75ns, and mini-
mum on-time is typically 100ns. GlitchCatcher provides
the greatest benefit when the output voltage is less
than 2V, and in applications using minimum output
capacitance.
Current S ense and Overload
Current Limiting
The current-sense circuit resets the main PWM latch
and turns off the high-side MOSFET switch whenever
the voltage difference between CSH and CSL from cur-
rent through the sense resistor (R1) exceeds the peak
current limit (100mV typical).
Current-mode control provides cycle-by-cycle current-
limit capability for maximum overload protection.
During normal operation, the peak current limit set by
the current-sense resistor determines the maximum
output current. When the output is shorted, the peak
current may be higher than the set current limit due to
delays in the current-sense comparator. Thus, foldback
current limiting is employed where the set current-limit
point is reduced from 100mV to 38mV as the output
(feedback) voltage falls (Figure 4). When the short-cir-
cuit condition is removed, the feedback voltage will
rise and the current-limit voltage will revert to 100mV.
The foldback current-limit circuit is designed to ensure
startup into a resistive load.
C3
C1
L1
D2
V
IN
= 5V
V
DD
N1
R4
DH
LEVEL
TRANSLATOR
CONTROL AND
DRIVE LOGIC
N2
R3
PGND
R3 AND R4
ARE OPTIONAL
LX
DL
BST
MAX1638
Figure 3. Boost Supply for Gate Drivers