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參數(shù)資料
| 型號(hào)： | MAX154BMRG |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | CMOS High-Speed 8-Bit ADCs with Multiplexer and Reference |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, CDIP24 |
| 封裝： | CERDIP-24 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大小： | 153K |
| 代理商： | MAX154BMRG |
Interfac e Mode 0
Figure 5 shows the timing diagram for Mode 0 opera-
tion. This is used with microprocessors that have WAIT
state capability, whereby a READ instruction is extend-
ed to accommodate slow-memory devices. Taking CS
and RD low latches the analog multiplexer address and
starts a conversion. Data outputs DB0–DB7 remain in
the high-impedance condition until the conversion is
complete.
There are two status outputs: Interrupt (INT) and Ready
(RDY). RDY, an open-drain output (no internal pull-up
device), is connected to the processor’s READY/WAIT
input. RDY goes low on the falling edge of CS and goes
high impedance at the end of the conversion, when the
conversion result appears on the data outputs. If the
RDY output is not required, its external pull-up resistor
can be omitted. INT goes low when the conversion is
complete and returns high on the rising edge of CS or
RD.
Interfac e Mode 1
Mode 1 is designed for applications where the micro-
processor is not forced into a WAIT state. Taking CS
and RD low latches the multiplexer address and starts
a conversion (Figure 6). Data from the previous
conversion is immediately read from the outputs
(DB0–DB7).
INT goes high at the rising edge of CS or RD and goes
low at the end of the conversion. A second READ oper-
ation is required to read the result of this conversion.
The second READ latches a new multiplexer address
and starts another conversion. A delay of 2.5μs must
be allowed between READ operations. RDY goes low
on the falling edge of CS and goes high impedance at
the rising edge of CS. If RDY is not needed, its external
pull-up resistor can be omitted.
M
CMOS High-S peed 8-Bit ADCs with
Multiplexer and Referenc e
_______________________________________________________________________________________
7
500ns
V
IN
IS TRACKED
BY INTERNAL
COMPARATORS
V
IN
IS SAMPLED
AND THE FOUR MSBs
ARE LATCHED
SETUP TIME REQUIRED
BY THE INTERNAL
COMPARATORS PRIOR TO
STARTING CONVERSION
600ns
RD
INT GOING LOW INDICATES
THAT CONVERSION IS
COMPLETE AND THAT
DATA CAN BE READ
1000ns
Figure 4. Operating Sequence
DATA
DATA
VALID
ADDR
VALID
ADDR
VALID
INT
RDY
RD
ANALOG
CHANNEL
ADDRESS
CS
t
AS
t
AH
t
RDY
t
CRD
HIGH IMPEDANCE
t
CSS
t
CSS
t
INTH
t
DH
t
ACC2
t
AS
t
P
t
CSH
Figure 5. Mode 0 Timing Diagram
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX154BMRG/883B | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX15500GTJ+ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC - 多種 Ind Alog Crnt/Volt Output Conditioner RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 分辨率:8 bit 工作電源電壓:2.7 V to 5.5 V 功耗: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:MSOP-10 封裝:Reel |
| MAX15500GTJ+T | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC - 多種 Ind Alog Crnt/Volt Output Conditioner RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 分辨率:8 bit 工作電源電壓:2.7 V to 5.5 V 功耗: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:MSOP-10 封裝:Reel |
| MAX15501EVKIT+ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 Ind Alog Crnt/Volt Output Conditioner RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX15501GTJ+ | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC - 多種 Ind Alog Crnt/Volt Output Conditioner RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 分辨率:8 bit 工作電源電壓:2.7 V to 5.5 V 功耗: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:MSOP-10 封裝:Reel |
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