參數(shù)資料
型號: MAX1499ECJ+T
廠商: Maxim Integrated Products
文件頁數(shù): 16/33頁
文件大小: 0K
描述: IC ADC 3 1/2DIG W/LED DVR 32TQFP
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,000
位數(shù): 3.5 位
采樣率(每秒): 5
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應商設備封裝: 32-LQFP(7x7)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個差分,雙極
MAX1497/MAX1499
3.5- and 4.5-Digit, Single-Chip ADCs with LED
Drivers and C Interface
______________________________________________________________________________________
23
Default values: 0000h
In addition to automatic offset calibration, the
MAX1497/MAX1499 offer a user-defined custom offset
16-bit read/write register. The final result of the ADC
conversion is the input after autocalibration minus
the value in the custom offset. The custom offset value
is stored in this register. D15 is the MSB. The data is
represented in two’s complement format.
ADC Custom Offset-Calibration Register (Read/Write)
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
ADC Result Register 1 (Read Only)
MSB
LSB
(MAX1497)
LSB
(MAX1499)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Default values: 0000h
ADC result register 1 is a 16-bit read-only register. This
register stores the 16 MSBs of the ADC result. The data
is represented in two’s complement format.
For the MAX1499, the data is 16-bit and D15 is the
MSB. For the MAX1497, the data is 12-bit, D15 is the
MSB, and D4 is the LSB.
Default values: 0000h
The LED data register is a 16-bit read/write register.
This register updates from ADC result register 1 or from
the serial interface by selecting the SPI/ADC bit in the
control register. The data is represented in two’s com-
plement format.
For the MAX1499, the data is 16-bit and D15 is the
MSB. For the MAX1497, the data is 12-bit, D15 is the
MSB, and D4 is the LSB, followed by 4 trailing sub-bits.
LED Data Register (Read/Write)
MSB
LSB
(MAX1497)
LSB
(MAX1499)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
ADC Result Register 2 (Read Only)
MSB
LSB
D3
D2
D1
D0
0
Default values: 00h
ADC result register 2 is an 8-bit read-only register. This
register stores the 4 LSBs of the ADC result.
Use this result with the result in ADC result-register 1 to
form a 20-bit two’s complement conversion result.
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