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參數(shù)資料
| 型號： | MAX1457AWI |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | 0.1%-Accurate Signal Conditioner for Piezoresistive Sensor Compensation |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO28 |
| 封裝： | SOP-28 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 93K |
| 代理商： | MAX1457AWI |
M
S ensor Compensation Overview
Compensation requires an examination of the sensor
performance over the operating pressure and tempera-
ture range. Use two test pressures (e.g., zero and full-
span) and two temperatures. More test pressures and
temperatures will result in greater accuracy. A simple
compensation procedure can be summarized as follows:
Set reference temperature (e.g., +25°C):
1) Initialize each transducer by loading its EEPROM with
default coefficients (e.g., based on mean values of
offset, FSO, and bridge resistance) to prevent gross
overload of the MAX1457.
2) Set the initial bridge voltage (with the FSO DAC) to
half the supply voltage. The bridge voltage can be
measured by the MAX1457 and returned to the test
computer via the serial interface or by using the sys-
tem digital voltmeter to measure the voltage on either
BDRIVE or VBBUF.
3) Calibrate the transducer’s output offset and FSO
using the OFFSET and FSO DACs, respectively.
4) Store calibration data in the test computer.
Set next test temperature:
5) Calibrate offset and FSO using the OFFSET TC and
FSO TC DACs, respectively.
6) Store calibration data in the test computer.
Repeat steps 5 and 6 for each required test tempera-
ture.
0.1%-Ac c urate S ignal Conditioner
for Piezoresistive S ensor Compensation
8
_______________________________________________________________________________________
MAX1457
CURRENT
SOURCE
V
DD
BIAS
GENERATOR
OSCILLATOR
1
1
1
1
1
FSOTCDAC
OTCDAC
OFSTDAC
FSODAC
LINDAC
LINOUT
FSOTCOUT
VBBUF
A = 1
A = 1
V
BDRIVE
V
DD
A = 1
OP AMP
AMPOUT
V
SS
VOUT
NBIAS
R
OSC
1.5M
0.1
μ
F
0.1
μ
F
0.1
μ
F
5 x 0.1
μ
F
R
BIAS
400k
V
DD
FADJ
FOUT
SERIAL
EEPROM
INTERFACE
12-BIT ADC
AGND
SENSOR
0.1
μ
F
+5V
+5V
V
DD
V
SS
5k*
+5V
0.1
μ
F
0.1
μ
F
*OPTIONAL PULL-UP RESISTOR
MCS
ECS
ECLK
EDI
EDO
LINDACREF
AMP+
AMP-
CS
CLK
DI
DO
V
DD
EEPROM
93C66 SO-8
ORG
V
SS
BDRIVE
ISRC
R
ISRC
50k
PGA
R
STC
R
LIN
(OPTIONAL)
INM
INP
VOUT
Figure 5. Basic Ratiometric Output Configuration
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