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參數(shù)資料
| 型號： | MAX14502AETL+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 16/41頁 |
| 文件大小： | 0K |
| 描述： | IC CARD READER USB-SD 40-TQFN |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 應用： | USB |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 1.8 V ~ 3.3 V |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 40-TQFN-EP（5x5） |
| 包裝： | 帶卷 (TR) |
| 安裝類型： | 表面貼裝 |
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MAX14500–MAX14503
Hi-Speed USB-to-SD Card
Readers with Bypass
______________________________________________________________________________________
23
Control Register (0x00)
The control register controls the settings of SD port
analog switches, Card Reader mode, and sleep (Table
2.) The state of the SD port analog switches can be
changed when the device is in Sleep mode or in Card
Reader mode, and actions are executed immediately. If
SD card 1 is connected to the PC through USB in Card
Reader mode, the state of the SD port 1 switches are
ignored, but the SD port 2 switches can still be con-
trolled through the Control register. Likewise, if SD card
2 is connected to the USB connector in Card Reader
mode, the state of the SD port 2 switches are ignored,
but the SD port 1 switches can still be controlled
through the Control register. Changing the card reader
bits in Sleep mode does not cause the device to enter
Card Reader mode. Under this condition, the
MAX14500–MAX14503 enter Card Reader mode upon
waking up.
Configuration Registers
The MAX14500–MAX14503 have three configuration reg-
isters (CONFIG1 = 0x01, CONFIG2 = 0x02, CONFIG3 =
0x03). The configuration registers control the SD bus
bit data mode, interrupt polarity, interrupt clearance,
clock configuration, SD clock, and USB speed for Card
Reader mode. The default settings are shown in the
Register Map section.
Interrupts (INT)
All interrupts are masked in the default reset state.
There are two interrupt enable registers (IE1 = 0x04, IE2
= 0x05) and two interrupt request registers (IRQ1 =
0x10, IRQ2 = 0x11). The BERR/INT output functions as
the bridge error output BERR in simple control and func-
tions as an interrupt INT in I2C control. The polarity of
INT and how INT is asserted can be programmed in
CONFIG1. The INT output asserts for enabled interrupts
and errors in Card Reader mode. The polarity of INT can
be active-high or active-low, and INT can be pro-
HCRD_PRST
HCLK1
HCMD1
HDAT1_[3:0]
CD+
HOST PROCESSOR
USB SWITCHES
CD-
D+
D-
HD+
HD-
USB
CONNECTOR
SD CARD INTERFACE
USB HS
CARD READER
CCRD_PRST
SD PORT 1 SWITCHES
CCLK1
CCMD1
BUSY
BERR
MODE = LOW
4
CDAT1_[3:0]
I2C_SEL = LOW
SD
PORT1
I/O
LEVEL
TRANSLATORS
HOST
I/O
SD
SLOT 1
USB
TRANSCEIVER
MAX14500–
MAX14503
Figure 10. I2C_SEL Connected Low to Enable Simple Control and MODE = 0 to Enable Pass Thru
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