參數(shù)資料
型號： MAX1448EVKIT
廠商： Maxim Integrated Products
文件頁數(shù)： 17/21頁
文件大?。?/td> 0K
描述： EVAL KIT FOR MAX1448
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 1
ADC 的數(shù)量： 1
位數(shù)： 10
采樣率（每秒）： 80M
數(shù)據(jù)接口： 并聯(lián)
輸入范圍： ±1 V
在以下條件下的電源（標準）： 120mW @ 80MSPS
工作溫度： 0°C ~ 70°C
已用 IC / 零件： MAX1448
已供物品： 板
MAX1448
10-Bit, 80Msps, Single 3.0V, Low-Power
ADC with Internal Reference
_______________________________________________________________________________________
5
Note 1: SNR, SINAD, THD, SFDR, and HD3 are based on an analog input voltage of -0.5dB FS referenced to a 1.024V full-scale
input voltage range.
Note 2: Intermodulation distortion is the total power of the intermodulation products relative to the individual carrier. This number is
6dB better if referenced to the two-tone envelope.
Note 3: Digital outputs settle to VIH,VIL.
Note 4: With REFIN driven externally, REFP, COM, and REFN are left floating while powered down.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER REQUIREMENTS
Analog Supply Voltage
VDD
2.7
3.0
3.6
V
Output Supply Voltage
OVDD
1.7
3.0
3.6
V
Operating, fIN = 20MHz at -0.5dB FS
40
47
mA
Analog Supply Current
IVDD
Shutdown, clock idle, PD =
OE = OVDD
415
A
Operating, CL = 15pF, fIN = 20MHz at
-0.5dB FS
8mA
Output Supply Current
IOVDD
Shutdown, clock idle, PD =
OE = OVDD
120
A
Offset
±0.2
mV/V
Power-Supply Rejection
PSRR
Gain
±0.1
%/V
TIMING CHARACTERISTICS
CLK Rise to Output Data Valid
tDO
Figure 6 (Note 3)
5
8
ns
OE Fall to Output Enable
tENABLE
Figure 5
10
ns
OE Rise to Output Disable
tDISABLE
Figure 5
15
ns
CLK Pulse Width High
tCH
Figure 6, clock period 12ns
6±1
ns
CLK Pulse Width Low
tCL
Figure 6, clock period 12ns
6±1
ns
Wake-Up Time
tWAKE
(Note 4)
1.5
s
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3.0V, OVDD = 2V, 0.1F and 1F capacitors from REFP, REFN, and COM to GND, VREFIN = 2.048V, REFOUT connected to
REFIN through a 10k resistor, VIN = 2VP-P (differential with respect to COM), CL = 10pF at digital outputs, fCLK = 83.3MHz, TA = TMIN
to TMAX, unless otherwise noted. ≥ +25°C guaranteed by production test, < +25°C guaranteed by design and characterization; typical
values are at TA = +25°C.)
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