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參數(shù)資料
| 型號： | MAX1447ECJ+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 3/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 4 1/2DIG W/LED DVR 32TQFP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,000 |
| 位數(shù)： | 4.5 位 |
| 采樣率（每秒）： | 50 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP |
| 供應商設備封裝： | 32-TQFP（5x5） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
MAX1447/MAX1496/MAX1498
3.5- and 4.5-Digit, Single-Chip ADCs
with LED Drivers
______________________________________________________________________________________
11
MAX1447
MAX1498
BINARY-TO-
BCD
CONVERTERS
ADC
LED
DRIVER
INPUT
BUFFERS
-2.5V
AIN+
AIN-
REF+
REF-
+2.5V
AVDD
DVDD
GLED
2.048V
BANDGAP
REFERENCE
OSCILLATOR
CLOCK
SEG1
SEGF
SEGDP
DIG0
DIG4
CLK
TIMING
+2.5V
GND
A = 1.22
CHARGE
PUMP
-2.5V
VNEG
LED_EN
DPON
DPSET1
DPSET2
RANGE
PEAK
HOLD
VLED
ISET
Figure 1. MAX1447/MAX1498 Functional Diagram
Modulator
The MAX1447/MAX1496/MAX1498 perform analog-to-
digital conversions using a single-bit, 3rd-order, sigma-
delta modulator. The sigma-delta modulator converts
the input signal into a digital pulse train whose average
duty cycle represents the digitized signal information.
The modulator quantizes the input signal at a much
higher sample rate than the bandwidth of the input.
The MAX1447/MAX1496/MAX1498 modulator provides
3rd-order frequency shaping of the quantization noise
resulting from the single-bit quantizer. The modulator is
fully differential for maximum signal-to-noise ratio and
minimum susceptibility to power-supply noise. A single-
bit data stream is then presented to the digital filter to
remove the frequency-shaped quantization noise.
Digital Filtering
The MAX1447/MAX1496/MAX1498 contain an on-chip
digital lowpass filter that processes the data stream
from the modulator using a SINC4 response:
The SINC4 filter has a settling time of four output data
periods (4 x 200ms).
The MAX1447/MAX1496/MAX1498 have 25% over-
range capability built into the modulator and digital fil-
ter. The digital filter is optimized for the fCLK equal to
4.9152MHz. The frequency response of the SINC4 filter is
calculated as follows:
where N is the oversampling ratio, and fm = N x output
data rate = 5Hz.
Hz
N
Z
Hf
N
f
N
m
()
sin
=
=
1 1
1
4
-
π
sin( )
x
4
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