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參數(shù)資料
| 型號： | MAX1402EAI+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 35/38頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 18BIT LP 28-SSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,000 |
| 位數(shù)： | 18 |
| 采樣率（每秒）： | 480 |
| 數(shù)據(jù)接口： | QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 34mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 供應商設(shè)備封裝： | 28-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 3 個差分，單極；3 個差分，雙極；5 個偽差分，單極；5 個偽差分，雙極 |
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MAX1402
+5V, 18-Bit, Low-Power, Multichannel,
Oversampling (Sigma-Delta) ADC
6
_______________________________________________________________________________________
Note 1:
Nominal gain is 0.98. This ensures a full-scale input voltage may be applied to the part under all conditions without caus-
ing saturation of the digital output data.
Note 2:
Positive Full-Scale Error includes zero-scale errors (unipolar offset error or bipolar zero error) and applies to both unipolar
and bipolar input ranges. This error does not include the nominal gain of 0.98.
Note 3:
Full-Scale Drift includes zero-scale drift (unipolar offset drift or bipolar zero drift) and applies to both unipolar and bipolar
input ranges.
Note 4:
Gain Error does not include zero-scale errors. It is calculated as (full-scale error - unipolar offset error) for unipolar ranges
and as (full-scale error - bipolar zero error) for bipolar ranges. This error does not include the nominal gain of 0.98.
Note 5:
Gain-Error Drift does not include unipolar offset drift or bipolar zero drift. It is effectively the drift of the part if zero-scale
error is removed.
Note 6:
Use of the offset DAC does not imply that any input may be taken below AGND.
Note 7:
Additional noise added by the offset DAC is dependent on the filter cutoff, gain, and DAC setting. No noise is added for a
DAC code of 0000.
Note 8:
Guaranteed by design or characterization; not production tested.
Note 9:
The absolute input voltage must be within the input-voltage range specification.
Note 10: All AIN and REFIN pins have identical input structures. Leakage is production tested only for the AIN3, AIN4, AIN5,
CALGAIN and CALOFF inputs.
Note 11: The dynamic load presented by the MAX1402 analog inputs for each gain setting is discussed in detail in the Switching
Network Section. Values are provided for the maximum allowable external series resistance.
2.4576MHz
1.024MHz
Buffers off
Buffers on
2.4576MHz
1.024MHz
2.43
3.6
Buffers off
Buffers on
Normal mode,
MF1 = 0,
MF0 = 0
4.23
5.75
2.43
3.75
Buffers on
3.7
Buffers on
2X mode,
MF1 = 0,
MF0 = 1
7.4
10
CONDITIONS
3.5
5.25
1.88
2.4576MHz
1.024MHz
Buffers off
Buffers on
2.4576MHz
1.024MHz
6.85
Buffers off
Buffers on
4X mode,
MF1 = 1,
MF0 = 0
25.8
33
10.8
14
Buffers on
25.2
Buffers on
8X mode,
MF1 = 1,
MF0 = 1
mW
26.7
34
PD
Power Dissipation
11.7
15
10.2
2.95
(Note 18)
10
100
W
Standby Power Dissipation
1.45
2.55
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
ELECTRICAL CHARACTERISTICS (continued)
(V+ = +5V ±5%, VDD = +2.7V to +5.25V, VREFIN+ = +2.50V, REFIN- = AGND, fCLKIN = 2.4576MHz, TA = TMIN to TMAX, unless other-
wise noted. Typical values are at TA = +25°C.)
4X mode,
MF1 = 1, MF0 = 0
mA
0.17
IDD
5V Digital Supply Current
1.024MHz
2.4576MHz
0.36
0.6
8X mode,
MF1 = 1, MF0 = 1
0.24
1.024MHz
2.4576MHz
0.53
0.8
5V POWER DISSIPATION (V+ = VDD = +5V, digital inputs = 0 or VDD, external CLKIN, burn-out and auxiliary currents disabled,
X2CLK = 0, CLK = 0 for 1.024MHz, CLK = 1 for 2.4576MHz.)
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| MAX1402EVC16 | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX1402 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
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