參數資料
型號: MAX1361MEUB+T
廠商: Maxim Integrated Products
文件頁數: 8/24頁
文件大小: 0K
描述: IC SYSTEM MON 10BIT 4CH 10-UMAX
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
位數: 10
采樣率(每秒): 150k
數據接口: I²C,串行
轉換器數目: 1
功率耗散(最大): 2mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 10-µMAX
包裝: 帶卷 (TR)
輸入數目和類型: 4 個單端,單極;4 個單端,雙極;2 個差分,單極;2 個差分,雙極
MAX1361/MAX1362
Reading a Conversion (Read Cycle)
Initiate a read cycle to start a conversion sequence and
to obtain conversion results. See the
Scan Modes
section for details on the channel-scan sequence. Read
cycles begin with the bus master issuing a START
condition followed by 7 address bits and a read bit
(R/W = 1). After successfully receiving the address byte,
the MAX1361/MAX1362 (slave) issue an ACK. The master
then reads from the slave. (See Figures 10–13.)
The result is transmitted in 2 bytes. The 1st byte con-
sists of a leading 1 followed by a 2-bit binary channel
address tag, a 12/10 bit flag (0 for the MAX1361/
MAX1362), 2 bits of 1s, the first 2 bits of the data result,
and the expected ACK from the master. The 2nd byte
4-Channel, 10-Bit, System Monitor with Programmable
Trip Window and SMBus Alert Response
16
______________________________________________________________________________________
BIT
NAME
DESCRIPTION
7 (MSB)
Setup
Setup byte always starts with 1.
6
REF/AIN SEL1
5
REF/AIN SEL0
When [0,0], REF/AIN3 = AIN3, REF = VDD.
When [0,1], REF/AIN3 = REF, REF = external reference.
When [1,0], REF/AIN3 = AIN3, REF = internal reference.
When [1,1], REF/AIN3 = REF, REF = internal reference.
(Table 3)
4
INT REF Power
Down
1 = internal reference always powered up.
0 = internal reference always powered down.
(Table 3)
3
INT/EXT Clock
0 = internal clock.
1 = external clock (MAX1361/MAX1362 use the SCL clock for conversions).
2
UNI/BIP
0 = unipolar.
1 = bipolar.
Selects unipolar or bipolar conversion mode. In unipolar mode, analog signal in 0 to VREF range
can be converted. In differential bipolar mode, input signal can range from -VREF/2 to +VREF/2.
When single-ended mode is chosen, the SE/
DIF bit of configuration byte overrides UNI/BIP, and
conversions are performed in unipolar mode.
1
Reset
1 = no action.
0 = resets
INT and configuration register. Setup register and channel trip thresholds are unaffected.
0
Monitor Setup
0 = no action.
1 = extends writing up to 13 bytes (104 bits) of alarm reset mask. Scans speed selection and
alarm thresholds. See the Configuring Monitor Mode section.
Table 4. Setup-Byte Format*
*
Power-on defaults: 0x82
CS1
CS0
CH0
CH1
CH2
CH3
00
+
01
+
10
+
11
+
Table 5. Channel Selection in Single-
Ended Mode (SE/DIF = 1)
CS1
CS0
CH0
CH1
CH2
CH3
00
+
-
01
-
+
10
+
-
11
-
+
Table 6. Channel Selection in Differential
Mode (SE/DIF = 0)
SE/DIF
UNI/BIP
MODE
0
Differential inputs, unipolar
0
1
Differential inputs, bipolar
1
0
Single-ended inputs, unipolar
1
Single-ended inputs, unipolar
Table 7. SE/DIF and UNI/BIP Table
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