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參數(shù)資料
| 型號： | MAX1343BETX+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 17/44頁 |
| 文件大小： | 0K |
| 描述： | IC ADC/DAC 12BIT W/FIFO 36WQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | ADC，DAC |
| 分辨率（位）： | 12 b |
| 采樣率（每秒）： | 225k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 2.7 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 36-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 36-TQFN 裸露焊盤（6x6） |
| 包裝： | 帶卷 (TR) |
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MAX1221/MAX1223/MAX1343
12-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
24
______________________________________________________________________________________
Channels 8–11 are invalid. Any scans or averages on
these channles can cause corrupt data.
Select scan mode 00 or 01 to return one result per sin-
gle-ended channel and one result per differential pair
within the selected scanning range (set by bits 2 and 1,
SCAN1 and SCAN0), plus one temperature result if
selected. Select scan mode 10 to scan a single input
channel numerous times, depending on NSCAN1 and
NSCAN0 in the ADC averaging register (Table 9).
Select scan mode 11 to return only one result from a
single channel.
Setup Register
Issue a command byte to the setup register to config-
ure the clock, reference, power-down modes, and ADC
single-ended/differential modes. Table 5 details the bits
in the setup-register command byte. Bits 5 and 4
(CKSEL1 and CKSEL0) control the clock mode, acqui-
sition and sampling, and the conversion start. Bits 3
and 2 (REFSEL1 and REFSEL0) set the device for either
internal or external reference. Bits 1 and 0 (DIFFSEL1
and DIFFSEL0) address the ADC unipolar-mode and
bipolar-mode registers and configure the analog input
channels for differential operation.
The ADC reference is always on if any of the following
conditions are true:
1) The FBGON bit is set to one in the reset register.
2) At least one DAC output is powered up and
REFSEL[1:0] (in the setup register) = 00.
3) At least one DAC is powered down through the
100kΩ to VREF and REFSEL[1:0] = 00.
If any of the above conditions exist, the ADC reference is
always on, but there is a 188 clock-cycle delay before
temperature-sensor measurements begin, if requested.
Table 4. Conversion Register*
BIT
NAME
BIT
FUNCTION
—
7 (MSB)
Set to one to select conversion register.
CHSEL3
6
Analog input channel select
(MAX1223). Set to 0 on the
MAX1221/MAX1343.
CHSEL2
5
Analog input channel select.
CHSEL1
4
Analog input channel select.
CHSEL0
3
Analog input channel select.
SCAN1
2
Scan mode select.
SCAN0
1
Scan mode select.
TEMP
0 (LSB)
Set to one to take a single temperature
measurement. The first conversion
result of a scan contains temperature
information.
CHSEL3
CHSEL2
CHSEL1
CHSEL0
SELECTED
CHANNEL (N)
0
AIN0
0
1
AIN1
0
1
0
AIN2
0
1
AIN3
0
1
0
AIN4
0
1
0
1
AIN5
0
1
0
AIN6
0
1
AIN7
1
0
AIN8
1
0
1
AIN9
1
0
1
0
AIN10
1
0
1
AIN11
SCAN1
SCAN0
SCAN MODE
(CHANNEL N IS SELECTED BY
BITS CHSEL3–CHSEL0)
0
Scans channels 0 through N.
01
Scans channels N through the highest
numbered channel.
10
Scans channel N repeatedly. The ADC
averaging register sets the number of
results.
11
No scan. Converts channel N once only.
*
See below for bit details.
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