參數(shù)資料
型號: MAX13037ATX+
廠商: Maxim Integrated Products
文件頁數(shù): 5/22頁
文件大?。?/td> 0K
描述: IC AUTO CONTACT MONITOR 36-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 50
應(yīng)用: 自動
接口: SPI
電源電壓: 6 V ~ 26 V
封裝/外殼: 36-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 36-TQFN 裸露焊盤(6x6)
包裝: 管件
安裝類型: 表面貼裝
MAX13037/MAX13038
Automotive Contact Monitor and
Level Shifters with LDO Regulator
______________________________________________________________________________________
13
Mechanical Switch Inputs (IN0–IN7)
IN0–IN7 are the inputs for remote mechanical switches.
The status of each switch input is indicated by the SW0
through SW7 bits in the status register, and each switch
input can be programmed to not assert an interrupt
(
INT) by writing to the P0–P7 bits in the command reg-
ister. All switch inputs are configured to assert an inter-
rupt upon power-up.
The first four inputs (IN0–IN3) are intended for ground-
connected switches. The remaining four inputs (IN4–IN7)
can be programmed in sets of two for either ground-con-
nected or battery-connected switches by writing to the
M0 and M1 bits (see Table 5). The default state after
power-up is IN2–IN7 configured for ground-connected
switches, and IN0/IN1 configured for direct inputs.
All switch inputs have internal 16kΩ sense resistors to
detect switch transitions. Inputs configured for ground-
connected switches are pulled up to BAT and inputs con-
figured for battery-connected switches are pulled down to
GND. Figure 5 shows the switch input structure for IN0
and IN1. IN0 and IN1 can be programmed as direct
inputs with level-shifted outputs (DO0 and DO1) by clear-
ing the WEND bit in the command register (normal mode
only). When programmed as direct inputs, IN0 and IN1
can be used for PWM or other signaling. Clearing the
WEND bit disables the sense resistors and wetting cur-
rents on IN0 and IN1. When programmed as direct inputs,
the status of IN0 and IN1 is not reflected in the status reg-
ister, and interrupts are not allowed on these inputs.
Switch Threshold Levels and
Hysteresis (BATREF, HYST)
Input thresholds for the remote switches are 50% of the
voltage applied to BATREF. The BATREF input is typical-
ly connected to the battery voltage before the reverse-
battery protection diode. The MAX13037/MAX13038
feature adjustable hysteresis on the switch inputs by
connecting an external 0 to 900kΩ resistor from HYST to
ground (normal mode only). Short HYST to ground to
obtain the maximum hysteresis of (0.5 x VBATREF). The
approximate formula for hysteresis is given below:
To reduce power consumption, the adjustable hystere-
sis can be disabled by setting [SC2:SC1:SC0 = 1:1:0]
in the command register. When the adjustable hystere-
sis is disabled, the hysteresis is set to 0.166 x VBATREF.
Switch Debounce and Deglitch
The switch inputs IN0–IN7 share a common program-
mable debounce timer to increase the noise immunity
of the system in normal and scan mode. The switch
debounce time is set by connecting a capacitor
between the tDEB input and ground. The minimum
value of this capacitor is 500pF and the maximum value
is 10nF, corresponding to a debounce time of 5ms to
100ms respectively. To calculate other debounce times
the following formula should be used:
C(nF) = tDEB(ms) / 10
All switch input glitches of less than 20s in duration are
automatically rejected by the MAX13037/MAX13038.
Debounce in Normal Mode
When a change of state occurs at the switch input the
debounce timer starts. If the new state is stable for at least
tDEB, the status register is updated and an interrupt is
generated (if enabled). If the input returns to its previous
state before the debounce time has elapsed, an interrupt
is not generated and the status register is not updated.
Debounce in Scan Mode
A change of state at the switch input causes the device to
automatically enter normal mode and the debounce timing
to start. The device remains in normal mode as long as the
input state differs from the previous state. As soon as the
debounce time ends, the status register is updated, an
interrupt is generated, and the device re-enters scan mode.
If the input returns to its previous state before the end
of the debounce time, the device re-enters scan mode,
an interrupt is not generated, and the status register is
not updated.
V
R
V
HYST
HYST(k )
BATREF
=+
+
Ω
0 166
43
123
.
((
)
()
MAX13037
MAX13038
16k
Ω*
NOTES:
*WETTING CURRENT AND PULLUP/DOWN RESISTORS ARE
CONTROLLED BY THE WEN AND WEND BITS IN THE COMMAND
REGISTER (SEE TABLE 4).
WETTING*
CURRENT
IN0, IN1
VBAT
CONTROL
LOGIC
Figure 5. Input Structure of IN0 and IN1
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