參數(shù)資料
型號: MAX1292EVKIT
廠商: Maxim Integrated Products
文件頁數(shù): 6/20頁
文件大?。?/td> 0K
描述: EVALUATION KIT FOR MAX1292
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
ADC 的數(shù)量: 1
位數(shù): 12
采樣率(每秒): 400k
數(shù)據(jù)接口: 并聯(lián)
輸入范圍: ±VREF/2
在以下條件下的電源(標準): 9.5mW @ 400kSPS
工作溫度: 0°C ~ 70°C
已用 IC / 零件: MAX1292,MAX1293
已供物品:
MAX1290/MAX1292
Digital Interface
Input (control byte) and output data are multiplexed on
a three-state parallel interface. This parallel interface
(I/O) can easily be interfaced with standard Ps. The
signals CS, WR, and RD control the write and read
operations. CS represents the chip-select signal, which
enables a P to address the MAX1290/MAX1292 as an
I/O port. When high, CS disables the CLK, WR, and RD
inputs and forces the interface into a high-impedance
(high-Z) state.
Input Format
The control byte is latched into the device on pins D7–
D0 during a write command. Table 2 shows the control
byte format.
Output Format
The output format for the MAX1290/MAX1292 is binary in
unipolar mode and two’s complement in bipolar mode.
When reading the output data, CS and RD must be low.
When HBEN = 0, the lower 8 bits are read. With HBEN =
1, the upper 4 bits are available and the output data bits
D7–D4 are set either low in unipolar mode or to the value
of the MSB in bipolar mode (Table 5).
400ksps, +5V, 8-/4-Channel, 12-Bit ADCs
with +2.5V Reference and Parallel Interface
14
______________________________________________________________________________________
Table 2. Control Byte Format
Table 4. Channel Selection for Pseudo-Differential Operation (SGL/DIF = 0)
Table 3. Channel Selection for Single-Ended Operation (SGL/DIF = 1)
*Channels CH4
CH7 apply to MAX1290 only.
*Channels CH4
CH7 apply to MAX1290 only.
A1
CH0
0
+
0
-
0
A0
0
-
1
CH2
CH4*
+
0
1
0
+
-
CH3
0
CH1
CH7*
CH6*
1
CH5*
1
-
+
0
A2
+
-
1
0
1
-
+
1
0
-
1
+
1
+
-
A1
CH0
0
+
0
A0
0
1
CH2
CH4*
+
0
1
0
+
CH3
-
0
CH1
CH7*
-
CH6*
-
COM
1
CH5*
1
+
-
0
A2
+
1
0
1
+
1
-
1
0
1
+
1
-
+
-
D6
D4
PD0
SGL/DIF
ACQMOD
A2
A0
A1
UNI/BIP
PD1
D5
D2
D0 (LSB)
D1
D3
D7 (MSB)
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