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參數(shù)資料
| 型號： | MAX1248ACPE+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 8/24頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT SERIAL 16-DIP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 25 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 133k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 842mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 16-DIP（0.300"，7.62mm） |
| 供應商設備封裝： | 16-PDIP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 4 個單端，單極；4 個單端，雙極；2 個差分，單極；2 個差分，雙極 |
MAX1248/MAX1249
+2.7V to +5.25V, Low-Power, 4-Channel,
Serial 10-Bit ADCs in QSOP-16
16
______________________________________________________________________________________
Software Power-Down
Software power-down is activated using bits PD1 and PD0
of the control byte. As shown in Table 5, PD1 and PD0
also specify the clock mode. When software shutdown is
asserted, the ADC operates in the last specified clock
mode until the conversion is complete. Then the ADC
powers down into a low quiescent-current state. In internal
clock mode, the interface remains active, and conversion
results may be clocked out after the MAX1248/MAX1249
enter a software power-down.
The first logical 1 on DIN is interpreted as a start bit
and powers up the MAX1248/MAX1249. Following the
start bit, the data input word or control byte also deter-
mines clock mode and power-down states. For exam-
ple, if the DIN word contains PD1 = 1, then the chip
remains powered up. If PD0 = PD1 = 0, a power-down
resumes after one conversion.
Hardware Power-Down
Pulling SHDN low places the converter in hardware
power-down (Table 6). Unlike software power-down
mode, the conversion is not completed; it stops coinci-
dentally with SHDN being brought low. SHDN also con-
trols the clock frequency in internal clock mode. Letting
SHDN float sets the internal clock frequency to 1.8MHz.
When returning to normal operation with SHDN floating,
there is a tRC delay of approximately 2M
x CL, where
CL is the capacitive loading on the SHDN pin. Pulling
SHDN high sets the internal clock frequency to 225kHz.
This feature eases the settling-time requirement for the
reference voltage. With an external reference, the
MAX1248/MAX1249 can be considered fully powered
up within 2s of actively pulling SHDN high.
Power-Down Sequencing
The MAX1248/MAX1249 auto power-down modes can
save considerable power when operating at less than
maximum sample rates. Figures 12, 13a, and 13b show
the average supply current as a function of the sampling
rate. The following discussion illustrates the various
power-down sequences.
Lowest Power at up to 500
Conversions/Channel/Second
The following examples illustrate two different power-
down sequences. Other combinations of clock rates,
compensation modes, and power-down modes may
give lowest power consumption in other applications.
Figure 13a depicts the MAX1248 power consumption
for one or eight channel conversions, utilizing full
power-down mode and internal-reference compensa-
tion. A 0.01F bypass capacitor at REFADJ forms an
RC filter with the internal 20k
reference resistor with a
0.2ms time constant. To achieve full 10-bit accuracy, 8
time constants or 1.6ms are required after power-up.
Waiting 1.6ms in FASTPD mode instead of in full power-
up can reduce the power consumption by a factor of 10
or more. This is achieved by using the sequence shown
in Figure 14.
Table 5. Software Power-Down and
Clock Mode
Table 6. Hardware Power-Down and
Internal Clock Frequency
S
SH
HD
DN
N
STATE
DEVICE
MODE
REFERENCE-
BUFFER
COMPENSATION
INTERNAL
CLOCK
FREQUENCY
1
Enabled
Internal
225kHz
Floating
Enabled
External
1.8MHz
0
Power-
Down
N/A
1000
10,000
0.1
100
10
1
CONVERSION RATE (Hz)
I DD
(
A)
1
100
10
1k
10k
1M
100k
VREF = VDD = 3.0V
RLOAD = ∞
CODE = 1010101000
1 CHANNEL
4 CHANNELS
Figure 12. Average Supply Current vs. Conversion Rate
with External Reference
PD1
PD0
DEVICE
0
Full Power-Down
0
1
Fast Power-Down
1
0
Internal Clock
1
External Clock
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參數(shù)描述 |
|---|---|
| MAX1248ACPE+ | 功能描述:模數(shù)轉換器 - ADC 10-Bit 4Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1248AEEE | 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1248AEEE+ | 功能描述:模數(shù)轉換器 - ADC 10-Bit 4Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1248AEEE+T | 功能描述:模數(shù)轉換器 - ADC 10-Bit 4Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1248AEEE-T | 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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