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參數(shù)資料
| 型號： | MAX1240ACPA |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | +2.7V, Low-Power, 12-Bit Serial ADCs in 8-Pin SO |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP8 |
| 封裝： | ROHS COMPLIANT, PLASTIC, DIP-8 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 280K |
| 代理商： | MAX1240ACPA |
V
DD
= 3.6V
V
DD
= 3.6V
M
+2.7V, Low-Power,
12-Bit S erial ADCs in 8-Pin S O
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +2.7V to +3.6V (MAX1240); V
DD
= +2.7V to +5.25V (MAX1241); 73ksps, f
SCLK
= 2.1MHz (50% duty cycle); MAX1240—4.7μF
capacitor at REF pin, MAX1241—external reference; V
REF
= 2.500V applied to REF pin; T
A
= T
MIN
to T
MAX
; unless otherwise noted.)
Note 1:
Tested at V
DD
= +2.7V.
Note 2:
Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range and
offset have been calibrated.
Note 3:
MAX1240—internal reference, offset nulled; MAX1241—external reference (V
REF
= +2.500V), offset nulled.
Note 4:
External load should not change during conversion for specified accuracy.
Note 5:
Guaranteed by design. Not subject to production testing.
Note 6:
Measured as [V
FS
(2.7V) - V
FS
(V
DD(MAX
)].
Note 7:
To guarantee acquisition time, t
ACQ
is the maximum time the device takes to acquire the signal, and is also the minimum
time needed for the signal to be acquired.
SCLK Pulse Width Low
SCLK Low to
CS
Fall Setup Time
DOUT Rise to SCLK Rise (Note 5)
CS
Pulse Width
t
CL
t
CS0
t
STR
t
CS
200
50
0
240
ns
ns
ns
ns
SCLK Pulse Width High
t
CH
200
ns
SCLK Clock Frequency
f
SCLK
0
2.1
MHz
CS
Rise to Output Disable
t
TR
240
ns
Figure 2, C
LOAD
= 50pF
CS
Fall to Output Enable
t
DV
240
ns
Figure 1, C
LOAD
= 50pF
PARAMETERS
SYMBOL
t
ACQ
MIN
1.5
20
TYP
MAX
UNITS
μs
CONDITIONS
Acquisition Time
CS
= V
DD
(Note 6)
Figure 1,
C
LOAD
= 50pF
TIMING CHARACTERISTICS
(Figure 8)
(V
DD
= +2.7V to +3.6V (MAX1240); V
DD
= +2.7V to +5.25V (MAX1241); T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETERS
SYMBOL
MIN
TYP
MAX
UNITS
CONDITIONS
2.7
2.7
3.6
5.25
2.0
3.5
1.5
MAX1240
MAX1241
V
DD
Supply Voltage
V
±0.3
(Note 5)
PSR
Supply Rejection
mV
20
240
SCLK Fall to Output Data Valid
t
DO
200
ns
MAX124_ _C/E
MAX124_ _M
1.4
1.4
0.9
Operating
mode
1.6
0.9
2.5
2.8
V
DD
= 3.6V
V
DD
= 5.25V
V
DD
= 3.6V
V
DD
= 5.25V
3.5
15
V
DD
= 3.6V
V
DD
= 5.25V
I
DD
1.9
10
Power-down, digital inputs
at 0V or V
DD
μA
MAX1240C
MAX1241A/B
Supply Current
MAX1240A/B
mA
1.6
3.8
MAX1241C
POWER REQUIREMENTS
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MAX1240ACPA+ | 功能描述:模數(shù)轉換器 - ADC 12-Bit 73ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1240ACSA | 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1240ACSA+ | 功能描述:模數(shù)轉換器 - ADC 12-Bit 73ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1240ACSA+T | 功能描述:模數(shù)轉換器 - ADC 12-Bit 73ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1240ACSA-T | 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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