參數(shù)資料
型號: MAX1233ETI+
廠商: Maxim Integrated Products
文件頁數(shù): 13/44頁
文件大?。?/td> 0K
描述: IC CNTRLR TOUCH 28-TQFN
其它有關(guān)文件: Automotive Product Guide
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 60
類型: 電阻
觸摸面板接口: 4 線
輸入數(shù)/鍵: 1,4 x 4 小鍵盤
分辨率(位): 8,10,12 b
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
數(shù)據(jù)速率/采樣率 (SPS,BPS): 50k
電壓基準(zhǔn): 外部,內(nèi)部
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 28-TQFN-EP(5x5)
包裝: 管件
MAX1233/MAX1234
±15kV ESD-Protected Touch-Screen
Controllers Include DAC and Keypad Controller
20
______________________________________________________________________________________
In order to read the entire first page of memory, for
example, the host processor must send the
MAX1233/MAX1234 the command 0x8000H. The
MAX1233/MAX1234 then begin clocking out 16-bit data
starting with the X-data register. In order to write to the
second page of memory, the host processor sends the
MAX1233/MAX1234 the command 0x0040H. The suc-
ceeding data is then written in 16-bit words beginning
with the ADC control register. Figures 10a and 10b show
a complete write and read operation, respectively,
between the processor and the MAX1233/MAX1234.
Memory Map
The MAX1233/MAX1234s’ internal memory is divided
into two pages—one for data and one for control, each
of which contains thirty-two 16-bit registers.
Control Registers
Table 3 provides a summary of all registers and bit
locations of the MAX1233/MAX1234.
ADC Control Register
The ADC measures touch position, touch pressure, bat-
tery voltage, auxiliary analog inputs, and temperature.
The ADC control register determines which input is
selected and converted. Tables 4 and 5 show the for-
mat and bit descriptions for the ADC control register.
DIN
DOUT
SCLK
D15
D15 IS READ/WRITE BIT
LOW FOR WRITE
D15–D0 COMMAND WORD
TIMING NOT TO SCALE.
D0
D15
D0
D15–D0 DATA WORD
THREE-
STATE
CS
WRITE OPERATION
THREE-
STATE
Figure 10a. Timing Diagram of Write Operation
SCLK
THREE-STATE
D15 D14
D15–D0 COMMAND
WORD
D0
THREE-STATE
D0
D15
DOUT
DIN
D0
D15
DATA WORD
CS
READ OPERATION
Figure 10b. Timing Diagram of Read Operation
BIT15
BIT14
BIT13 BIT12 BIT11
BIT10
BIT9
BIT8
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
PENSTS
ADSTS
A/D3
A/D2
A/D1
A/D0
RES1
RES0
AVG1
AVG0
CNR1
CNR0
ST2
ST1
ST0
RFV
Table 4. ADC Control Register (Write 0x0040/Read 0x8040)
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