參數(shù)資料
型號: MAX1230
廠商: Maxim Integrated Products, Inc.
元件分類: ADC
英文描述: 12-Bit 300ksps ADCs with FIFO. Temp Sensor. Internal Reference
中文描述: 12位、300ksps ADC,帶有FIFO、溫度傳感器及內(nèi)部基準
文件頁數(shù): 17/24頁
文件大?。?/td> 543K
代理商: MAX1230
M
12-Bit 300ksps ADCs with FIFO,
Temp Sensor, Internal Reference
______________________________________________________________________________________
17
Internally Timed Acquisitions and
Conversions Using
CNVST
Performing Conversions in Clock Mode 00
In clock mode 00, the wake up, acquisition, conversion,
and shutdown sequences are initiated through
CNVST
and performed automatically using the internal oscilla-
tor. Results are added to the internal FIFO to be read
out later. See Figure 4 for clock mode 00 timing.
Initiate a scan by setting
CNVST
low for at least 40ns
before pulling it high again. The MAX1226/MAX1228/
MAX1230 then wake up, scan all requested channels,
store the results in the FIFO, and shut down. After the
scan is complete,
EOC
is pulled low and the results are
available in the FIFO. Wait until
EOC
goes low before
pulling
CS
low to communicate with the serial interface.
EOC
stays low until
CS
or
CNVST
is pulled low again. A
temperature measurement result, if requested, pre-
cedes all other FIFO results.
Do not initiate a second
CNVST
before
EOC
goes low;
otherwise the FIFO can become corrupted.
Externally Timed Acquisitions and
Internally Timed Conversions with
CNVST
Performing Conversions in Clock Mode 01
In clock mode 01, conversions are requested one at a
time using
CNVST
and performed automatically using the
internal oscillator. See Figure 5 for clock mode 01 timing.
Setting
CNVST
low begins an acquisition, wakes up the
ADC, and places it in track mode. Hold
CNVST
low for
at least 1.4μs to complete the acquisition. If internal ref-
erence needs to wake up, an additional 65μs is
required for the internal reference to power up. If a tem-
perature measurement is being requested, reference
power-up and temperature measurement are internally
timed. In this case, hold
CNVST
low for at least 40ns.
Set
CNVST
high to begin a conversion. After the con-
version is complete, the ADC shuts down and pulls
EOC
low.
EOC
stays low until
CS
or
CNVST
is pulled
low again. Wait until
EOC
goes low before pulling
CS
or
CNVST
low.
If averaging is turned on, multiple
CNVST
pulses need
to be performed before a result is written to the FIFO.
Once the proper number of conversions has been per-
formed to generate an averaged FIFO result, as speci-
fied by the averaging register, the scan logic
automatically switches the analog input multiplexer to
the next-requested channel. If a temperature measure-
ment is programmed, it is performed after the first rising
edge of
CNVST
following the input data byte written to
the conversion register. The result is available on DOUT
once
EOC
has been pulled low.
Internally Timed Acquisitions and
Conversions Using the Serial Interface
Performing Conversions in Clock Mode 10
In clock mode 10, the wake-up, acquisition, conversion,
and shutdown sequences are initiated by writing an
input data byte to the conversion register, and are per-
formed automatically using the internal oscillator. This
is the default clock mode upon power-up. See Figure 6
for clock mode 10 timing.
(UP TO 514 INTERNALLY CLOCKED ACQUISITIONS AND CONVERSIONS)
CS
DOUT
MSB1
LSB1
MSB2
SCLK
CNVST
EOC
SET CNVST LOW FOR AT LEAST 40ns TO BEGIN A CONVERSION.
Figure 4. Clock Mode 00
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