參數(shù)資料
型號: MAX1195ECM+D
廠商: Maxim Integrated Products
文件頁數(shù): 13/22頁
文件大?。?/td> 0K
描述: IC ADC 8BIT 40MSPS DL 48-TQFP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 250
位數(shù): 8
采樣率(每秒): 40M
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 2
功率耗散(最大): 108mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP 裸露焊盤
供應商設備封裝: 48-TQFP 裸露焊盤(7x7)
包裝: 托盤
輸入數(shù)目和類型: 4 個單端,雙極;2 個差分,雙極
MAX1195
Dual, 8-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel Outputs
20
______________________________________________________________________________________
Dynamic Parameter Definitions
Aperture Jitter
Figure 11 depicts the aperture jitter (tAJ), which is the
sample-to-sample variation in the aperture delay.
Aperture Delay
Aperture delay (tAD) is the time defined between the
rising edge of the sampling clock and the instant when
an actual sample is taken (Figure 11).
Signal-to-Noise Ratio
For a waveform perfectly reconstructed from digital
samples, the theoretical maximum SNR is the ratio of
the full-scale analog input (RMS value) to the RMS
quantization error (residual error). The ideal, theoretical
minimum analog-to-digital noise is caused by quantiza-
tion error only and results directly from the ADC’s reso-
lution (N-bits):
SNRdB[max] = 6.02dB N + 1.76dB
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reference noise, clock jitter,
etc. SNR is computed by taking the ratio of the RMS
signal to the RMS noise, which includes all spectral
components minus the fundamental, the first five har-
monics, and the DC offset.
Signal-to-Noise Plus Distortion
SINAD is computed by taking the ratio of the RMS sig-
nal to all spectral components minus the fundamental
and the DC offset.
Effective Number of Bits
Effective number of bits (ENOB) specifies the dynamic
performance of an ADC at a specific input frequency
and sampling rate. An ideal ADC’s error consists of
quantization noise only. ENOB for a full-scale sinusoidal
input waveform is computed from:
Total Harmonic Distortion
THD is typically the ratio of the RMS sum of the first four
harmonics of the input signal to the fundamental itself.
This is expressed as:
where V1 is the fundamental amplitude, and V2 through
V5 are the amplitudes of the 2nd- through 5th-order
harmonics.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio
expressed in decibels of the RMS amplitude of the fun-
damental (maximum signal component) to the RMS
value of the next largest spurious component, exclud-
ing DC offset.
Intermodulation Distortion
The two-tone intermodulation distortion (IMD) is the
ratio expressed in decibels of either input tone to the
worst third-order (or higher) intermodulation products.
The individual input tone levels are at -7dB full scale
and their envelope is at -1dB full scale.
THD
VVV
V
log
++
+
20
2
3
2
4
2
5
2
1
ENOB
SINAD
.
=
176
602
Chip Information
TRANSISTOR COUNT: 11,601
PROCESS: CMOS
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