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參數(shù)資料
| 型號(hào)： | MAX1183ECM+D |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT 40MSPS DUAL 48-TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 位數(shù)： | 10 |
| 采樣率（每秒）： | 40M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 180mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP 裸露焊盤（7x7） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 4 個(gè)單端，雙極；2 個(gè)差分，雙極 |
| 產(chǎn)品目錄頁面： | 1396 (CN2011-ZH PDF) |
Figure 4 displays the timing relationship between output
enable and data output valid, as well as power-
down/wake-up and data output valid.
Power-Down (PD) and Sleep
(SLEEP) Modes
The MAX1183 offers two power-save modes—sleep and
full power-down modes. In sleep mode (SLEEP = 1), only
the reference bias circuit is active (both ADCs are
disabled), and current consumption is reduced to 2.8mA.
To enter full power-down mode, pull PD high. With
OE
simultaneously low, all outputs are latched at the last
value prior to the power down. Pulling
OE high forces
the digital outputs into a high-impedance state.
Applications Information
Figure 5 depicts a typical application circuit containing
two single-ended to differential converters. The internal
reference provides a VDD/2 output voltage for level-
shifting purposes. The input is buffered and then split
to a voltage follower and inverter. One lowpass filter per
ADC suppresses some of the wideband noise associat-
ed with high-speed op amps follows the amplifiers. The
user may select the RISO and CIN values to optimize
the filter performance, to suit a particular application.
For the application in Figure 5, a RISO of 50 is placed
before the capacitive load to prevent ringing and
oscillation. The 22pF CIN capacitor acts as a small
bypassing capacitor.
Using Transformer Coupling
An RF transformer (Figure 6) provides an excellent solu-
tion to convert a single-ended source signal to a fully dif-
ferential signal, required by the MAX1183 for optimum
performance. Connecting the center tap of the trans-
former to COM provides a VDD/2 DC level shift to the
input. Although a 1:1 transformer is shown, a step-up
transformer may be selected to reduce the drive require-
ments. A reduced signal swing from the input driver, such
as an op amp, may also improve the overall distortion.
In general, the MAX1183 provides better SFDR and
THD with fully differential input signals than single-
ended drive, especially for very high input frequencies.
In differential input mode, even-order harmonics are
lower as both inputs (INA+, INA- and/or INB+, INB-) are
balanced, and each of the ADC inputs only requires
half the signal swing compared to single-ended mode.
Single-Ended AC-Coupled Input Signal
Figure 7 shows an AC-coupled, single-ended applica-
tion. Amplifiers like the MAX4108 provide high speed,
high bandwidth, low noise, and low distortion to main-
tain the integrity of the input signal.
Typical QAM Demodulation Application
The most frequently used modulation technique for dig-
ital communications applications is probably the quad-
rature amplitude modulation (QAM). Typically found in
spread-spectrum-based systems, a QAM signal repre-
sents a carrier frequency modulated in both amplitude
and phase. At the transmitter, modulating the base-
band signal with quadrature outputs, a local oscillator
followed by subsequent up-conversion can generate
the QAM signal. The result is an in-phase (I) and
a quadrature (Q) carrier component, where the Q
MAX1183
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel Outputs
______________________________________________________________________________________
13
OUTPUT
D9A–D0A
OE
tDISABLE
tENABLE
HIGH-Z
VALID DATA
OUTPUT
D9B–D0B
HIGH-Z
VALID DATA
Figure 4. Output Timing Diagram
DIFFERENTIAL INPUT
VOLTAGE*
DIFFERENTIAL INPUT
STRAIGHT OFFSET BINARY
T/B = 0
TWO'S COMPLEMENT
T/B = 1
VREF x 511/512
+FULL SCALE - 1LSB
11 1111 1111
01 1111 1111
VREF x 1/512
+ 1LSB
10 0000 0001
00 0000 0001
0
Bipolar Zero
10 0000 0000
00 0000 0000
- VREF x 1/512
- 1LSB
01 1111 1111
11 1111 1111
-VREF x 512/512
-FULL SCALE +1LSB
00 0000 0001
10 0000 0001
-VREF x 512/512
-FULL SCALE
00 0000 0000
10 0000 0000
Table 1. MAX1183 Output Codes for Differential Inputs
*VREF = VREFP - VREFN
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| MAX1183ECM-TD | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1184ECM | 制造商:Maxim Integrated Products 功能描述:DUAL 10-BIT, 20MSPS, +3V, LOW-POWER ADC WITH - Rail/Tube |
| MAX1184ECM+D | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 2Ch 30Msps High Speed ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1184ECM+TD | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 2Ch 30Msps High Speed ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1184ECM-D | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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