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參數(shù)資料
| 型號： | MAX116EVB16 |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL KIT FOR MAX116 |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 116k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 輸入范圍： | ±2.5 V |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 17mW @ 116kSPS |
| 工作溫度： | 0°C ~ 70°C |
| 已用 IC / 零件： | MAX116 |
| 已供物品： | 2 板，CD |
Track/Holds
The MAX115/MAX116 feature four simultaneous T/Hs.
Each T/H has two multiplexed inputs. A T-switch input
configuration provides excellent hold-mode isolation.
Allow 600ns acquisition time for 12-bit accuracy.
The T/H aperture delay is typically 10ns. The 500ps
aperture-delay mismatch between the T/Hs allows the
relative phase information of up to four different inputs
to be preserved. Figure 3 shows the equivalent input
circuit, illustrating the ADC’s sampling architecture.
Only one of four T/H stages with its two multiplexed
inputs (CH_A and CH_B) is shown. All switches are in
track configuration for channel A. An internal buffer
charges the hold capacitor to minimize the required
acquisition time between conversions. The analog input
appears as a 10k
resistor in parallel with a 16pF
capacitor for the MAX115 and as a 1M
resistor in par-
allel with a 16pF capacitor for the MAX116.
Between conversions, the buffer input is connected to
channel 1 of the selected track/hold bank. When a
channel is not selected, switches S1, S2, and S3 are
placed in hold mode to improve channel-to-channel
isolation.
Digital Interface
Input data (A0–A3) and output data (D0–D11) are multi-
plexed on a three-state bidirectional interface. This par-
allel I/O can easily be interfaced with a microprocessor
(P) or DSP. CS, WR, and RD control the write and read
operations. CS is the standard chip-select signal, which
enables the controller to address the MAX115/MAX116
as an I/O port. When CS is high, it disables the WR and
RD inputs and forces the interface into a high-Z state.
Figure 4 details the interface timing.
Programming Modes
The MAX115/MAX116 have eight conversion modes
plus power-down, which are programmed through a
bidirectional parallel interface. At power-up, the devices
default to the Input Mux A/Single-Channel Conversion
mode. The user can select between two banks (mux
inputs A or mux inputs B) of four simultaneous-sampled
input channels, as illustrated in Figure 2. An internal
microsequencer can be programmed to convert one to
four channels of the selected bank per sample. For a
single-channel conversion, CH1 is digitized, and then
INT goes low to indicate completion of the conversion.
MAX115/MAX116
2x4-Channel, Simultaneous-Sampling
12-Bit ADCs
_______________________________________________________________________________________
9
CH1
CH2
CH3
CH4
tACQ
tCONV
tAH
tAS
t WR
tCWH
tDH
tDA
tRD
tCRS
tCRH
tRD
tID
tCWS
CONVST
INT
CS
WR
DATA
tCW
DATA IN
RD
Figure 4. Timing Diagram
Figure 5. Programming a Four-Channel Conversion, Input Mux A
A0
(LSB)
WR
CS
A1
A2
A3
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX116EVKIT | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX116 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX116XXI2CMB+ | 制造商:Maxim Integrated Products 功能描述:EV KIT - Rail/Tube |
| MAX1170CDJ | 制造商:Maxim Integrated Products 功能描述: |
| MAX1171CDJ | 制造商:Maxim Integrated Products 功能描述: |
| MAX1174ACUP | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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