參數(shù)資料
型號(hào): MAX1169BEUD+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 4/20頁(yè)
文件大?。?/td> 0K
描述: IC ADC 16BIT SER 14-TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 16
采樣率(每秒): 58.6k
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 864mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個(gè)單端,單極
MAX1169
The time required for the T/H to acquire an input signal
is a function of the analog input source impedance. If
the input signal source impedance is high, lengthen the
acquisition time by reducing fSCL. The MAX1169 pro-
vides two SCL cycles (tACQ) in which the track-and-
hold capacitance must acquire a charge representing
the input signal. Minimize the input source impedance
(RSOURCE) to allow the track-and-hold capacitance to
charge within the allotted time. RSOURCE should be
less than 11.3kΩ for fSCL = 400kHz and less than 2kΩ
for fSCL = 1.7MHz. RSOURCE is calculated with the fol-
lowing equation:
R
fIn(22 )
C
R
SOURCE
SCL
N
IN
××
×
2
58.6ksps, 16-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP
12
______________________________________________________________________________________
Figure 3. MAX1169 Simplified Functional Diagram
AIN
AGNDS
CONTROL
LOGIC
4MHz
INTERNAL
OSCILLATOR
OUTPUT SHIFT
REGISTER
T/H
SAR
ADC
REF
CLOCK
IN
OUT
+4.096V
REFERENCE
REFADJ
REF
5k
Ω
ADD0
ADD1
ADD2
ADD3
DVDD
AVDD
DGND
SCL
SDA
AGND
8
13
12
11
9
1
2
3
4
5
6
7
10
14
MAX1169
AV = 1.0
Figure 4. Typical Application Circuit
AIN
REF
10
μF
0.1
μF
REFADJ
AGNDS
AVDD
0.1
μF
AGND
DGND
ANALOG
SOURCE
ADD1
ADD0
ADD2
SCL
SDA
DVDD
0.1
μF
3.0V
5.0V
μC
VDD
SDA
SCL
RP
ADD3
VSS
8
13
12
11
14
91
2
3
4
5
6
7
10
I2C ADDRESS IS 0110111.
MAX1169
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