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參數(shù)資料
| 型號： | MAX1168CEEG |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | Multichannel, 16-Bit, 200ksps Analog-to-Digital Converters |
| 中文描述： | 8-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24 |
| 封裝： | 0.150 INCH, 0.025 INCH PITCH, MO-137AE, QSOP-24 |
| 文件頁數(shù)： | 26/30頁 |
| 文件大?。?/td> | 462K |
| 代理商： | MAX1168CEEG |
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M
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
26
______________________________________________________________________________________
DOUT*
CS
SCLK
1ST BYTE READ
2ND BYTE READ
*WHEN CS IS HIGH, DOUT = HIGH-Z
MSB
HIGH-Z
3RD BYTE READ
LSB
D1
D0
D7
D6
D5
D4
D3
D2
24
20
16
12
8
6
4
1
D15
D14
D13
D12
D11
D10
D9
D8
0
0
0
0
0
0
0
0
Figure 22b. SPI Interface Timing with PIC16/PIC17 in Master Mode (CKE = 1, CKP = 0, SMP = 0, SSPM3 - SSPM0 = 0001)
Serial Interfaces
SPI and MICROWIRE Interfaces
When using the SPI (Figure 20a) or MICROWIRE (Figure
20b) interfaces, set CPOL = 0 and CPHA = 0. Drive
CS
low to power on the MAX1167/MAX1168 before starting a
conversion (Figure 20c). Three consecutive 8-bit-wide
readings are necessary to obtain the entire 16-bit result
from the ADC. DOUT data transitions on the serial clock
’
s
falling edge. The first 8-bit-wide data stream contains all
leading zeros. The 2nd 8-bit-wide data stream contains
the MSB through D6. The 3rd 8-bit-wide data stream con-
tains D5 through D0 followed by S1 and S0.
QSPI Interface
Using the high-speed QSPI interface with CPOL = 0 and
CPHA = 0, the MAX1167/MAX1168 support a maximum
f
SCLK
of 4.8MHz. Figure 21a shows the MAX1167/
MAX1168 connected to a QSPI master, and Figure 21b
shows the associated interface timing.
PIC16 with SSP Module and PIC17
Interface
The MAX1167/MAX1168 are compatible with a
PIC16/PIC17 controller (μC), using the synchronous seri-
al-port (SSP) module.
To establish SPI communication, connect the controller
as shown in Figure 22a and configure the PIC16/PIC17
as system master by initializing its synchronous serial-
port control register (SSPCON) and synchronous serial-
port status register (SSPSTAT) to the bit patterns shown
in Tables 7 and 8.
In SPI mode, the PIC16/PIC17 μCs allow 8 bits of data to
be synchronously transmitted and received simultane-
ously. Three consecutive 8-bit-wide readings (Figure
22b) are necessary to obtain the entire 16-bit result from
the ADC. DOUT data transitions on the serial clock
’
s
falling edge and is clocked into the μC on SCLK
’
s rising
edge. The first 8-bit-wide data stream contains all zeros.
The 2nd 8-bit-wide data stream contains the MSB
through D6. The 3rd 8-bit-wide data stream contains bits
D5 through D0 followed by S1 and S0.
DSP
EXTERNAL
CLOCK
SCLK
DSPR
DSPX
DIN
DOUT
CS
SCLK
TFS
RFS
DT
DR
FL1
MAX1168
Figure 23. DSP Interface Connection
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX1168CEEG+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1168CEEG+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1168CEEG+W | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube |
| MAX1168CEEG-T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1168EVC16 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC MAX1168 Evaluation Kit/Evaluation System RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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