參數(shù)資料
型號(hào): MAX1162CEUB+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 18/18頁(yè)
文件大?。?/td> 0K
描述: IC ADC 16BIT 200KSPS 10-UMAX
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 16
采樣率(每秒): 200k
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 444mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-µMAX
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個(gè)單端,單極
MAX1162
16-Bit, +5V, 200ksps ADC with 10A
Shutdown
_______________________________________________________________________________________
9
Input Bandwidth
The ADC’s input tracking circuitry has a 4MHz small-
signal bandwidth, so it is possible to digitize high-
speed transient events and measure periodic signals
with bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques. To avoid aliasing of
unwanted high-frequency signals into the frequency
band of interest, use anti-alias filtering.
Analog Input Protection
Internal protection diodes, which clamp the analog
input to AVDD or AGND, allow the input to swing from
AGND - 0.3V to AVDD + 0.3V, without damaging the
device.
If the analog input exceeds 300mV beyond the sup-
plies, limit the input current to 10mA.
SCLK
DOUT
tCSS
tCH
tCL
tDV
tCSH
tCSW
tTR
tDO
tCP
CS
TIMING NOT TO SCALE.
Figure 3. Detailed Serial Interface Timing
SCLK
DOUT
AGND
DGND
AIN
REF
AVDD
DVDD
DOUT
SCLK
CS
AIN
VREF
+5V
4.7
F
0.1
F
0.1
F
GND
MAX1162
CS
Figure 4. Typical Operating Circuit
DOUT
a) VOL TO VOH
b) HIGH-Z TO VOL AND VOH TO VOL
DOUT
1mA
DGND
CLOAD = 50pF
VDD
Figure 1. Load Circuits for DOUT Enable Time and SCLK to
DOUT Delay Time
DOUT
a) VOH TO HIGH-Z
b) VOL TO HIGH-Z
DOUT
1mA
DGND
CLOAD = 50pF
VDD
Figure 2. Load Circuits for DOUT Disable Time
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MAX1162EVSYS 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Evaluation System/Evaluation Kit for the MAX1162/MAX1062
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