參數(shù)資料
型號: MAX1161ACPI
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: Low-Voltage Adjustable Precision Shunt Regulator 3-SOT-23 -40 to 85
中文描述: 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDIP28
封裝: 0.600 INCH, PLASTIC, DIP-28
文件頁數(shù): 5/8頁
文件大?。?/td> 78K
代理商: MAX1161ACPI
M
10-Bit, 40Msps, T T L-Output ADC
_______________________________________________________________________________________
5
__________________________________________Typic al Operating Charac teristic s
(T
A
= +25°C, unless otherwise noted.)
80
20
1
10
100
TOTAL HARMONIC DISTORTION vs.
INPUT FREQUENCY
40
30
M
INPUT FREQUENCY (MHz)
T
60
50
70
f
S
= 40Msps
80
20
1
10
100
SIGNAL-TO-NOISE AND DISTORTION
vs. INPUT FREQUENCY
40
30
M
INPUT FREQUENCY (MHz)
S
60
50
70
f
S
= 40Msps
80
20
1
10
100
SNR, THD, SINAD vs.
SAMPLE RATE
40
30
M
SAMPLE RATE (Msps)
S
60
50
70
SINAD
SNR
f
IN
= 1MHz
THD
65
40
-25
50
75
0
25
SNR, THD, SINAD vs.
TEMPERATURE
50
45
M
TEMPERATURE (°C)
S
60
55
f
S
= 40Msps
f
IN
= 1MHz
THD
SNR
SINAD
0
-120
0
6
8
10
2
4
SPECTRAL RESPONSE
-60
-90
M
INPUT FREQUENCY (MHz)
A
-30
f
S
= 40Msps
f
IN
= 1MHz
80
20
1
10
100
SIGNAL-TO-NOISE vs.
INPUT FREQUENCY
40
30
M
INPUT FREQUENCY (MHz)
S
60
50
70
f
S
= 40Msps
_______________Detailed Desc ription
The MAX1161 requires few external components to
achieve the stated operation and performance. Figure 2
shows the typical interface requirements when using the
MAX1161 in normal circuit operation. The following sec-
tion provides a description of the pin functions, and out-
lines critical performance criteria to consider for
achieving optimal device performance.
Power S upplies and Grounding
The MAX1161 requires -5.2V and +5V analog supply
voltages. The +5V supply is common to analog V
CC
and
digital DV
CC
. A ferrite bead in series with each supply
line reduces the transient noise injected into the analog
V
CC
. These beads should be connected as close to the
device as possible. The connection between the beads
and the MAX1161 should not be shared with any other
device. Bypass each power-supply pin as close to the
device as possible. Use 0.1μF for V
EE
and V
CC
, and
0.01μF for DV
CC
(chip capacitors are recommended).
The MAX1161 has two grounds: AGND and DGND.
These internal grounds are isolated on the device. Use
ground planes for optimum device performance.
Use DGND for the DV
CC
return path (typically 40mA)
and for the return path for all digital output logic inter-
faces. Separate AGND and DGND from each other,
connecting them together only through a ferrite bead at
the device.
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