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參數(shù)資料
| 型號： | MAX1135BEAP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 2/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT 150KSPS 20-SSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 150k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 26.4mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個(gè)單端，單極；1 個(gè)單端，雙極 |
MAX1134/MAX1135
The user-programmable outputs are set to zero during
power-on reset or when RST goes low. During hardware
or software shutdown, P0, P1, and P2 are unchanged
and remain low impedance.
Starting a Conversion
Start a conversion by clocking a control byte into the
device’s internal shift register. With CS low, each rising
edge on SCLK clocks a bit from DIN into the
MAX1134/MAX1135s’ internal shift register. After CS
goes low or after a conversion or calibration completes,
the first arriving logic 1 is defined as the start bit of the
control byte. Until this first start bit arrives, any number of
logic 0 bits can be clocked into DIN with no effect. If at
any time during acquisition or conversion CS is brought
high and then low again, the part is placed into a state
where it can recognize a new start bit. If a new start bit
occurs before the current conversion is complete, the
conversion is aborted and a new acquisition is initiated.
Internal and External Clock Modes
The MAX1134/MAX1135 use either the external serial
clock or the internal clock to perform the successive-
approximation conversion. In both clock modes, the
external clock shifts data in and out of the
MAX1134/MAX1135. Bit 5 (INT/EXT) of the control byte
programs the clock mode.
External Clock
In external clock mode, the external clock not only
shifts data in and out, but also drives the ADC conver-
sion steps.
In short acquisition mode, SSTRB pulses high for one
clock period after the seventh falling edge of SCLK fol-
lowing the start bit. The MSB of the conversion is avail-
able at DOUT on the eighth falling edge of SCLK
(Figure 2).
16-Bit ADCs, 150ksps, 3.3V Single Supply
10
______________________________________________________________________________________
SCLK
DOUT
A/D
STATE
DIN
SSTRB
CS
4
18
START
M1
M0
P2
P1
P0
UNI/
BIP
INT/
EXT
14
29
32
B4
B14
B15
MSB
B13
B3
B1
B0
LSB
B2
FILLED WITH
ZEROS
tACQ
ACQUISITION
CONVERSION
IDLE
15
Figure 3. Long Acquisition Mode (32 Clock Cycles) External Clock
tSDV
tSSTRB
tSTR
P1 CLOCKED IN
SSTRB
SCLK
CS
Figure 4. External Clock Mode SSTRB Detailed Timing
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX1136 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:2.7V to 3.6V and 4.5V to 5.5V, Low-Power, 4-/12-Channel, 2-Wire Serial 10-Bit ADCs |
| MAX1136_09 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:2.7V to 3.6V and 4.5V to 5.5V, Low-Power, 4-/12-Channel, 2-Wire Serial 10-Bit ADCs |
| MAX1136EUA | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1136EUA+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 4Ch 94.4ksps 5.5V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1136EUA+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 4Ch 94.4ksps 5.5V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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