參數(shù)資料
型號(hào): MAX1134BEAP
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: Low-Voltage Adjustable Precision Shunt Regulator 3-SOT-89 0 to 70
中文描述: 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
封裝: 5.30 MM, 0.65 MM PITCH, SSOP-20
文件頁(yè)數(shù): 7/18頁(yè)
文件大?。?/td> 353K
代理商: MAX1134BEAP
M
16-Bit ADCs, 150ksps, 3.3V Single Supply
_______________________________________________________________________________________
7
Pin Description
PIN
NAME
FUNCTION
1
REF
ADC Reference Input. Connect a 2.048V voltage source to REF. Bypass REF to AGND with a 4.7μF capacitor.
2
AV
DD
Analog Supply. Connect to pin 4.
3
AGND
Analog Ground. This is the primary analog ground (star ground).
4
AV
DD
Analog Supply, 3.3V
±
5%. Bypass AV
DD
to AGND (pin 3) with a 0.1μF capacitor.
5
DGND
Digital Ground
6
SHDN
Shutdown Control Input. Drive
SHDN
low to put the ADC in shutdown mode.
7
P2
User-Programmable Output 2
8
P1
User-Programmable Output 1
9
P0
User-Programmable Output 0
10
SSTRB
Serial Strobe Output. In internal clock mode, SSTRB goes low when the ADC begins a conversion and goes
high when the conversion is finished. In external clock mode, SSTRB pulses high for one clock period before
the MSB decision. It is high impedance when
CS
is high in external clock mode.
11
DOUT
Serial Data Output. MSB first, straight binary format for unipolar input, two
s complement for bipolar input.
Each bit is clocked out of DOUT at the falling edge of SCLK.
12
RST
Reset Input. Drive
RST
low to put the device in the power-on default mode. See the
Power-On Reset
section.
13
SCLK
Serial Data Clock Input. Serial data on DIN is loaded on the rising edge of SCLK, and serial data is updated
on DOUT on the falling edge of SCLK. In external clock mode, SCLK sets the conversion speed.
14
DGND
Digital Ground. Connect to pin 5.
15
DV
DD
Digital Supply, 3.3V
±
5%. Bypass DV
DD
to DGND (pin 14) with a 0.1μF capacitor.
16
DIN
Serial Data Input. Serial data on DIN is latched on the rising edge of SCLK.
17
CS
Chip-Select Input. Drive
CS
low to enable the serial interface. When
CS
is high, DOUT is high impedance. In
external clock mode, SSTRB is high impedance when
CS
is high.
18
CREF
Reference Buffer Bypass. Bypass CREF to AGND (pin 3) with a 1μF capacitor.
19
AGND
Analog Ground. Connect to pin 3.
20
AIN
Analog Input
相關(guān)PDF資料
PDF描述
MAX1135BCAP Low-Voltage Adjustable Precision Shunt Regulator 3-SOT-89 0 to 70
MAX1135BEAP 16-Bit ADCs, 150ksps, 3.3V Single Supply
MAX1136 Low-Voltage Adjustable Precision Shunt Regulator 3-SOT-23 -40 to 85
MAX1137 2.7V to 3.6V and 4.5V to 5.5V, Low-Power, 4-/12-Channel, 2-Wire Serial 10-Bit ADCs
MAX1138 2.7V to 3.6V and 4.5V to 5.5V, Low-Power, 4-/12-Channel, 2-Wire Serial 10-Bit ADCs
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