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        • 您現(xiàn)在的位置:買賣IC網(wǎng) > PDF目錄9844 > MAX1132BCAP+T (Maxim Integrated Products)IC ADC 16BIT 200KSPS 20-SSOP PDF資料下載
        參數(shù)資料
        型號(hào): MAX1132BCAP+T
        廠商: Maxim Integrated Products
        文件頁數(shù): 19/19頁
        文件大小: 0K
        描述: IC ADC 16BIT 200KSPS 20-SSOP
        產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
        Obsolescence Mitigation Program
        標(biāo)準(zhǔn)包裝: 2,000
        位數(shù): 16
        采樣率(每秒): 200k
        數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
        轉(zhuǎn)換器數(shù)目: 1
        功率耗散(最大): 55mW
        電壓電源: 模擬和數(shù)字
        工作溫度: 0°C ~ 70°C
        安裝類型: 表面貼裝
        封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
        供應(yīng)商設(shè)備封裝: 20-SSOP
        包裝: 帶卷 (TR)
        輸入數(shù)目和類型: 1 個(gè)單端,單極;1 個(gè)單端,雙極
        第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁
        The DIN input accepts Control Byte data which is
        clocked in on each rising edge of SCLK. After
        CS goes
        low or after a conversion or calibration completes, the
        first logic “1” clocked into DIN is interpreted as the
        START bit, the MSB of the 8-bit Control Byte.
        The SCLK input is the serial data transfer clock which
        clocks data in and out of the MAX1132/MAX1133.
        SCLK also drives the A/D conversion steps in external
        clock mode (see Internal and External Clock Modes
        section).
        DOUT is the serial output of the conversion result.
        DOUT is updated on the falling edge of SCLK. DOUT is
        high-impedance when
        CS is high.
        CS must be low for the MAX1132/MAX1133 to accept a
        Control Byte. The serial interface is disabled when
        CS
        is high.
        User-Programmable Outputs
        The MAX1132/MAX1133 have three user-programma-
        ble outputs, P0, P1 and P2. The power-on default state
        for the programmable outputs is zero. These are push-
        pull CMOS outputs suitable for driving a multiplexer, a
        PGA, or other signal preconditioning circuitry. The user-
        programmable outputs are controlled by bits 0, 1, and
        2 of the Control Byte (Table 2).
        The user-programmable outputs are set to zero during
        power-on reset (POR) or when
        RST goes low. During
        hardware or software shutdown P0, P1, and P2 are
        unchanged and remain low-impedance.
        Starting a Conversion
        Start a conversion by clocking a Control Byte into the
        device’s internal shift register. With
        CS low, each rising
        edge on SCLK clocks a bit from DIN into the
        MAX1132/MAX1133’s internal shift register. After
        CS
        goes low or after a conversion or calibration completes,
        the first arriving logic “1” is defined as the start bit of
        the Control Byte. Until this first start bit arrives, any
        number of logic “0” bits can be clocked into DIN with
        no effect. If at any time during acquisition or conversion,
        CS is brought high and then low again, the part is
        placed into a state where it can recognize a new start
        bit. If a new start bit occurs before the current conver-
        sion is complete, the conversion is aborted and a new
        acquisition is initiated.
        Internal and External Clock Modes
        The MAX1132/MAX1133 may use either the external
        serial clock or the internal clock to perform the succes-
        sive-approximation conversion. In both clock modes,
        the external clock shifts data in and out of the
        MAX1132/MAX1133. Bit 5 (INT/
        EXT) of the Control Byte
        programs the clock mode.
        External Clock
        In external clock mode, the external clock not only
        shifts data in and out, but it also drives the ADC con-
        version steps. In short acquisition mode, SSTRB pulses
        high for one clock period after the seventh falling edge
        of SCLK following the start bit. The MSB of the conver-
        sion is available at DOUT on the eighth falling edge of
        SCLK (Figure 2).
        In long acquisition mode, when using external clock,
        SSTRB pulses high for one clock period after the fif-
        teenth falling edge of SCLK following the start bit. The
        MSB of the conversion is available at DOUT on the six-
        teenth falling edge of SCLK (Figure 3).
        In external clock mode, SSTRB is high-impedance
        when
        CS is high. In external clock mode, CS is normally
        held low during the entire conversion. If
        CS goes high
        during the conversion, SCLK is ignored until
        CS goes
        low. This allows external clock mode to be used with 8-
        bit bytes.
        Internal Clock
        In internal clock mode, the MAX1132/MAX1133 gener-
        ates its own conversion clock. This frees the micro-
        processor from the burden of running the SAR conver-
        sion clock, and allows the conversion results to be read
        back at the processor’s convenience, at any clock rate
        up to 8MHz.
        SSTRB goes low at the start of the conversion and goes
        high when the conversion is complete. SSTRB will be
        MAX1132/MAX1133
        16-Bit ADC, 200ksps, 5V Single-Supply
        with Reference
        _______________________________________________________________________________________
        9
        S1 = BIPOLAR/UNIPOLAR
        S2, S3 = T/H SWITCH
        S3
        S2
        AIN
        S1
        R1
        2.5k
        R3
        R2
        VOLTAGE
        REFERENCE
        T/H OUT
        HOLD
        TRACK
        BIPOLAR
        UNIPOLAR
        R2 = 7.6k (MAX1132)
        OR 2.5k (MAX1133)
        R3 = 3.9k (MAX1132)
        OR INFINITY (MAX1133)
        CHOLD
        30pF
        Figure 1. Equivalent Input Circuit
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        相關(guān)代理商/技術(shù)參數(shù)
        參數(shù)描述
        MAX1132BEAP 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
        MAX1132BEAP+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 200ksps 5V Single-Supply w/Ref RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
        MAX1132BEAP+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 200ksps 5V Single-Supply w/Ref RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
        MAX1132BEAP-T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
        MAX1132EVC16 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 16-Bit 200ksps 5V Single-Supply w/Ref RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
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