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參數(shù)資料
| 型號： | MAX1127 |
| 廠商： | Maxim Integrated Products, Inc. |
| 元件分類： | 串行ADC |
| 英文描述： | Quad, 12-Bit, 65Msps, 1.8V ADC with Serial LVDS Outputs |
| 中文描述： | 四路、12位、65Msps、1.8V ADC，串行LVDS輸出 |
| 文件頁數(shù)： | 3/25頁 |
| 文件大小： | 1661K |
| 代理商： | MAX1127 |
M
Quad, 12-Bit, 65Msps, 1.8V ADC with
Serial LVDS Outputs
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= 1.8V, OV
DD
= 1.8V, CV
DD
= 1.8V, GND = 0, external V
REFIO
= 1.24V,
INTREF
= AV
DD
, C
REFIO
to GND = 0.1μF,
f
CLK
= 65MHz (50% duty cycle), DT = 0, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25
°
C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
93.3
92
88.9
-91
-91
-88
MAX
UNITS
f
IN
= 5.3MHz at -0.5dBFS
f
IN
= 19.3MHz at -0.5dBFS, T
A
≥
+25°C
f
IN
= 30.3MHz at -0.5dBFS
f
IN
= 5.3MHz at -0.5dBFS
f
IN
= 19.3MHz at -0.5dBFS, T
A
≥
+25°C
f
IN
= 30.3MHz at -0.5dBFS
f
1
= 12.348685MHz at -6.5dBFS,
f
2
= 13.650845MHz at -6.5dBFS ( N ote 2)
(Note 2)
(Note 2)
(Note 2)
Input at -20dBFS (Notes 2 and 4)
Input at -0.5dBFS (Notes 2 and 4)
INP = IN_N
77.5
Spurious-Free Dynamic Range
(Note 2)
SFDR
dBc
-77.5
Total H ar m oni c D stor i on ( N ote 2)
THD
dBc
Inter m od ul ati on D stor i on
IMD
91.2
dBc
Third-Order Intermodulation
Aperture Jitter
Aperture Delay
Small-Signal Bandwidth
Full-Power Bandwidth
Output Noise
IM3
t
AJ
t
AD
SSBW
LSBW
95.7
<0.4
1
100
100
0.35
dBc
ps
RMS
ns
MHz
MHz
LSB
RMS
Clock
cycles
Overdrive Recovery Time
t
OR
R
S
= 25
, C
S
= 50pF
1
INTERNAL REFERENCE (
INTREF
= GND, bypass REFIO to GND with 0.1μF)
INTREF
Internal Reference Mode
Enable Voltage
(Note 5)
0.1
V
INTREF
Low-Leakage Current
REFIO Output Voltage
200
1.24
μA
V
V
REFIO
1.18
1.30
Reference Temperature
Coefficient
TC
REFIO
100
ppm/°C
EXTERNAL REFERENCE (
INTREF
= AV
DD
)
INTREF
External Reference Mode
Enable Voltage
(Note 5)
AV
DD
-
0.1V
V
INTREF
High-Leakage Current
REFIO Input Voltage Range
REFIO Input Current
CLOCK INPUT (CLK)
200
1.24
<1
μA
V
μA
I
REFIO
Input High Voltage
V
CLKH
0.8 x
CV
DD
V
Input Low Voltage
V
CLKL
0.2 x
CV
DD
V
Clock Duty Cycle
Clock Duty-Cycle Tolerance
50
±30
%
%
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