參數資料
型號: MAX11200EEE+T
廠商: Maxim Integrated Products
文件頁數: 26/27頁
文件大?。?/td> 0K
描述: ADC 24BIT 1CH ULP GPIO 16-QSOP
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
位數: 24
采樣率(每秒): 480
數據接口: 串行,SPI?
轉換器數目: 1
功率耗散(最大): 667mW
電壓電源: 模擬和數字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應商設備封裝: 16-QSOP
包裝: 帶卷 (TR)
輸入數目和類型: 1 個差分,單極;1 個差分,雙極
8
Maxim Integrated
24-Bit, Single-Channel, Ultra-Low-Power,
Delta-Sigma ADCs with GPIO
MAX11200/MAX11210
Pin Description
Pin Configuration
PIN
NAME
FUNCTION
1
GPIO1
General-Purpose I/O 1. Register controllable using SPI.
2
GPIO2
General-Purpose I/O 2. Register controllable using SPI.
3
GPIO3
General-Purpose I/O 3. Register controllable using SPI.
4
GND
Ground. Ground reference for analog and digital circuitry.
5
REFP
Differential Reference Positive Input. REFP must be more positive than REFN. Connect REFP to a voltage
between AVDD and GND.
6
REFN
Differential Reference Negative Input. REFN must be more negative than REFP. Connect REFN to a
voltage between AVDD and GND.
7
AINN
Negative Fully Differential Analog Input
8
AINP
Positive Fully Differential Analog Input
9
AVDD
Analog Supply Voltage. Connect a supply voltage between +2.7V and +3.6V with respect to GND.
10
DVDD
Digital Supply Voltage. Connect a digital supply voltage between +1.7V and +3.6V with respect to GND.
11
CS
Active-Low, Chip-Select Logic Input
12
DIN
Serial-Data Input. Data present at DIN is shifted to the device’s internal registers at the rising edge of
the serial clock at SCLK, when the device is accessed for an internal register write or for a command
operation.
13
RDY/DOUT
Data Ready Output/Serial-Data Output. This output serves a dual function. In addition to the serial-data
output function, the RDY/DOUT also indicates that the data is ready when the RDY is logic-low. RDY/
DOUT changes on the falling edge of SCLK.
14
SCLK
Serial-Clock Input. Apply an external serial clock to SCLK.
15
CLK
External Clock Signal Input. When external clock mode is selected (EXTCLK = 1), provide a 2.4576MHz
or 2.048MHz clock signal at CLK. Other frequencies can be used, but the data rate and digital filter notch
frequencies scale accordingly.
16
GPIO4
General-Purpose I/O 4. Register controllable using SPI.
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
GPIO1
GPIO4
CLK
SCLK
RDY/DOUT
DIN
CS
DVDD
AVDD
TOP VIEW
QSOP
GPIO2
GPIO3
REFN
GND
REFP
AINN
AINP
+
MAX11200
MAX11210
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MAX11201 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:24-Bit, Single-Channel, Ultra-Low-Power, Delta Sigma ADC with 2-Wire Serial Interface
MAX11201AEUB+ 功能描述:模數轉換器 - ADC 24-Bit Delta-Sigma RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX11201AEUB+T 功能描述:模數轉換器 - ADC 24-Bit Delta-Sigma RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
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