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參數(shù)資料
| 型號： | MAX1109EUB+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 8/20頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 8BIT LP 10-UMAX |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 50k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 444mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 10-µMAX |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個單端，單極；2 個單端，雙極；1 個偽差分，單極；1 個偽差分，雙極 |
MAX1108/MAX1109
Single-Supply, Low-Power,
2-Channel, Serial 8-Bit ADCs
16
______________________________________________________________________________________
to the SCLK pin; varying the analog input alters the
result of conversion that is clocked out at the DOUT pin.
A total of 10 clock cycles is required per conversion.
Data Framing
The falling edge of CS does not start a conversion. The
first logic high clocked into DIN is interpreted as a start
bit and defines the first bit of the control byte.
Acquisition starts on the falling edge of the fourth SCLK
and lasts for two SCLKs in external clock mode or four
SCLKs in internal clock mode. Conversion starts imme-
diately after acquisition is completed. The start bit is
defined as:
The first high bit clocked into DIN with CS
low any time the converter is idle; e.g., after
VDD is applied.
OR
In external clock mode, the first high bit
clocked into DIN after the bit 5 (D5) of a con-
version in progress is clocked onto the
DOUT pin.
OR
In internal clock mode, the first high bit
clocked into DIN after the bit 4 (D4) is
clocked onto the DOUT pin.
The MAX1108/MAX1109 can run at a maximum speed
of 10 clocks per conversion. Figure 10 shows the serial-
interface timing necessary to perform a conversion
every 10 SCLK cycles in external clock mode.
Many microcontrollers require that conversions occur in
multiples of 8 SCLK clocks; 16 clocks per conversion is
typically the fastest that a microcontroller can drive the
MAX1108/MAX1109. Figure 11 shows the serial-inter-
face timing necessary to perform a conversion every 16
SCLK cycles in external clock mode.
SCLK
DIN
DOUT
CS
S
CONTROL BYTE 0
CONTROL BYTE 1
S
CONVERSION RESULT 0
D7
D5
D0
D7
D5
D0
D7
CONVERSION RESULT 1
CONTROL BYTE 2
S
1
810
1
10
1
10
1
S
tACQ
IDLE
A/D STATE
tCONV
Figure 10. Continuous Conversion, External Clock Mode, 10 Clocks/Conversion Timing
SCLK
DIN
DOUT
CS
S
CONTROL BYTE 0
CONTROL BYTE 1
S
CONVERSION RESULT 0
D7
D0
D7
D0
CONVERSION RESULT 1
S
1
817
25
Figure 11. Continuous Conversion, External Clock Mode, 16 Clocks/Conversion Timing
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MAX110ACAP | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX110ACAP+ | 制造商:Maxim Integrated Products 功能描述:LOW-COST, 2-CHANNEL, ?14-BIT SERIAL ADCS - Bulk |
| MAX110ACAP+T | 制造商:Maxim Integrated Products 功能描述:20 PINS SSOP PKG - Tape and Reel |
| MAX110ACAP-T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX110ACPE | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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