參數(shù)資料
型號: MAX11045ETN+T
廠商: Maxim Integrated Products
文件頁數(shù): 13/28頁
文件大小: 0K
描述: ADC 16BIT SAMPLING 6CH 56-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 16
采樣率(每秒): 250k
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 6
功率耗散(最大): 3.81W
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 56-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 56-TQFN-EP(8x8)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 6 個單端,雙極
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
20
Maxim Integrated
MAX11044/MAX11044B/MAX11045/MAX11045B/
MAX11046/MAX11046B/MAX11054/MAX11055/MAX11056
Reference Buffer
The MAX11044/MAX11044B/MAX11045/MAX11045B/
MAX11046/MAX11046B and MAX11054/MAX11055/
MAX11056 have a built-in reference buffer to provide a
low-impedance reference source to the SAR convert-
ers. This buffer is used in both internal and external ref-
erence mode. The reference buffer output feeds five
RDC pins. The RDC pins should be all connected
together on the PCB. The reference buffer is externally
compensated and requires at least 10μF on the RDC
node. For best performance, provide a total of at least
80μF on the RDC outputs.
Transfer Functions
Figures 8 and 9 show the transfer functions for all the
formats and devices. Code transitions occur halfway
between successive-integer LSB values.
-FS
7FFF
0001
0000
8000
8001
FFFE
INPUT VOLTAGE (LSB)
OUTPUT
CODE
(hex)
FFFF
0
FULL-SCALE
TRANSITION
+FS
+32,766.5 x VLSB
-32,767.5 x VLSB
-FS = -32,768 x VLSB
7FFE
+FS = 32,767 x VLSB
VLSB = (10/4.096) x (VREF/65,536)
+ 32,768
OUTPUT CODE =
VLSB
VIN
Figure 8. Two’s Complement Transfer Function for 16-Bit Devices
-FS
1FFF
0001
0000
2000
2001
3FFE
INPUT VOLTAGE (LSB)
OUTPUT
CODE
(hex)
3FFF
0
FULL-SCALE
TRANSITION
+FS
+8190.5 x VLSB
-8191.5 x VLSB
-FS = -8192 x VLSB
1FFE
+FS = 8191 x VLSB
VLSB = (10/4.096) x (VREF/16,384)
OUTPUT CODE =
VLSB
VIN
+ 8192
Figure 9. Offset-Binary Transfer Function for 16-Bit Devices
OUTPUT
CODE
(hex)
FULL-SCALE
TRANSITION
-FS
FFFF
8001
8000
0000
0001
7FFE
INPUT VOLTAGE (LSB)
7FFF
0
+FS
FFFE
OUTPUT CODE =
VLSB = (10/4.096) x (VREF/65,536)
-FS = -32,768 x VLSB
+FS = 32,767 x VLSB
+32,766.5 x VLSB
-32,767.5 x VLSB
VLSB
VIN
Figure 8b. Two’s Complement Transfer Function for 14-Bit Devices
OUTPUT
CODE
(hex)
FULL-SCALE
TRANSITION
-FS
3FFF
2001
2000
0000
0001
1FFE
INPUT VOLTAGE (LSB)
1FFF
0
+FS
+8190.5 x VLSB
-8191.5 x VLSB
3FFE
VLSB = (10/4.096) x (VREF/16,384)
OUTPUT CODE =
VLSB
VIN
-FS = -8192 x VLSB
+FS = 8191 x VLSB
Figure 9b. Offset-Binary Transfer Function for 14-Bit Devices
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