參數(shù)資料
型號: MAX11045ECB+T
廠商: Maxim Integrated Products
文件頁數(shù): 5/28頁
文件大小: 0K
描述: IC ADC 16BIT PAR 250KSPS 64TQFP
標準包裝: 750
位數(shù): 16
采樣率(每秒): 250k
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 6
功率耗散(最大): 3.48W
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: *
封裝/外殼: *
供應商設備封裝: *
包裝: *
輸入數(shù)目和類型: 6 個單端,雙極
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
13
Maxim Integrated
MAX11044/MAX11044B/MAX11045/MAX11045B/
MAX11046/MAX11046B/MAX11054/MAX11055/MAX11056
Pin Description (continued)
MAX11044/
MAX11044B
(TQFP-EP)
MAX11045/
MAX11045B
(TQFP-EP)
MAX11046/
MAX11046B
(TQFP-EP)
NAME
FUNCTION
26, 55
RDC_SENSE
Reference Buffer Sense Feedback. Connect to RDC
plane.
27, 33, 40, 48,
54
27, 33, 40, 48,
54
27, 33, 40, 48,
54
RDC
Reference Buffer Decoupling. Connect all RDC outputs
together. Bypass to AGND with at least an 80μF total
capacitance. See the Layout, Grounding, and Bypassing
section.
37
34
31
CH0
Channel 0 Analog Input
39
37
34
CH1
Channel 1 Analog Input
42
39
37
CH2
Channel 2 Analog Input
44
42
39
CH3
Channel 3 Analog Input
41
REFIO
External Reference Input/Internal Reference Output.
Place a 0.1μF capacitor from REFIO to AGND.
44
42
CH4
Channel 4 Analog Input
47
44
CH5
Channel 5 Analog Input
47
CH6
Channel 6 Analog Input
50
CH7
Channel 7 Analog Input
61
WR
Active-Low Write Input. Drive WR low to write to the
ADC. Configuration registers are loaded on the rising
edge of WR.
62
CS
Active-Low Chip-Select Input. Drive CS low when
reading from or writing to the ADC.
63
RD
Active-Low Read Input. Drive RD low to read from the
ADC. Each rising edge of RD advances the channel
output on the data bus.
64
DB15
16-Bit Parallel Data Bus Digital Output Bit 15
31, 34, 47, 50
31, 50
I.C.
Internally Connected. Connect to AGND.
——
EP
Exposed Pad. Internally connected to AGND. Connect to
a large ground plane to maximize thermal performance.
Not intended as an electrical connection point.
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