參數(shù)資料
型號： MAX11044ETN+T
廠商： Maxim Integrated Products
文件頁數(shù)： 2/28頁
文件大?。?/td> 0K
描述： ADC 16BIT SAMPLING 4CH 56-TQFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
位數(shù)： 16
采樣率（每秒）： 250k
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 4
功率耗散（最大）： 3.81W
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 56-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 56-TQFN-EP（8x8）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 4 個單端，雙極
4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
10
Maxim Integrated
MAX11044/MAX11044B/MAX11045/MAX11045B/
MAX11046/MAX11046B/MAX11054/MAX11055/MAX11056
Pin Description
PIN
MAX11044/
MAX11044B
(TQFN-EP)
MAX11045/
MAX11045B
(TQFN-EP)
MAX11046/
MAX11046B
(TQFN-EP)
NAME
FUNCTION
1
DB13
16-Bit Parallel Data Bus Digital Output Bit 13
2
DB12
16-Bit Parallel Data Bus Digital Output Bit 12
3
DB11
16-Bit Parallel Data Bus Digital Output Bit 11
4
DB10
16-Bit Parallel Data Bus Digital Output Bit 10
5
DB9
16-Bit Parallel Data Bus Digital Output Bit 9
6
DB8
16-Bit Parallel Data Bus Digital Output Bit 8
7, 21, 50
DGND
Digital Ground
8, 20, 51
DVDD
Digital Supply. Bypass to DGND with a 0.1μF capacitor
at each DVDD input.
9
DB7
16-Bit Parallel Data Bus Digital Output Bit 7
10
DB6
16-Bit Parallel Data Bus Digital Output Bit 6
11
DB5
16-Bit Parallel Data Bus Digital Output Bit 5
12
DB4
16-Bit Parallel Data Bus Digital Output Bit 4
13
DB3/CR3
16-Bit Parallel Data Bus Digital Output Bit 3/
Configuration Register Input Bit 3
14
DB2/CR2
16-Bit Parallel Data Bus Digital Output Bit 2/
Configuration Register Input Bit 2
15
DB1/CR1
16-Bit Parallel Data Bus Digital Output Bit 1/
Configuration Register Input Bit 1
16
DB0/CR0
16-Bit Parallel Data Bus Digital Output Bit 0/
Configuration Register Input Bit 0
17
EOC
Active-Low End-of-Conversion Output. EOC goes low
when conversion is completed. EOC goes high when a
conversion is initiated.
18
CONVST
Convert Start Input. Rising edge of CONVST ends
sample and starts a conversion on the captured sample.
The ADC is in acquisition mode when CONVST is low
and CONVST mode = 0.
19
SHDN
Shutdown Input. If SHDN is held high, the entire device
will enter and stay in a low-current state. Contents of
the configuration register are not lost when in the
shutdown mode.
22, 28, 35,
43, 49
22, 28, 35,
43, 49
22, 28, 35,
43, 49
RDC
Reference Buffer Decoupling. Connect all RDC outputs
together. Bypass to AGND with at least an 80μF total
capacitance. See the Layout, Grounding, and Bypassing
section.
23, 27, 33, 38,
44, 48
23, 27, 33, 38,
44, 48
23, 27, 33, 38,
44, 48
AGNDS
Signal Ground. Connect all AGND and AGNDS inputs
together on PCB.
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參數(shù)描述
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