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參數(shù)資料
| 型號： | MAX11040KDBEVKIT# |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 30/35頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT EVAL FOR MAX11040 W/FMC CONN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 軟件下載： | MAX11040KEVKIT |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 4 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 3.07M |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 輸入范圍： | ±2.2 V |
| 工作溫度： | -40°C ~ 105°C |
| 已用 IC / 零件： | MAX11040K |
| 已供物品： | 板 |
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MAX11040K/MAX11060
24-/16-Bit, 4-Channel, Simultaneous-Sampling,
Cascadable, Sigma-Delta ADCs
4
Maxim Integrated
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = +3.0V to +3.6V, VDVDD = +2.7V to VAVDD, fXIN CLOCK = 24.576MHz, fOUT = 16ksps, VREFIO = +2.5V (external), CREFIO =
CREF0 = CREF1 = CREF2 = CREF3 = 1μF to AGND, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS (SCLK,
CS, DIN, SYNC, CASCIN, DRDYIN, XIN)
Input Low Voltage
VIL
0.3 x
VDVDD
V
Input High Voltage
VIH
0.7 x
VDVDD
V
Input Hysteresis
VHYS
VDVDD = 3.0V
100
mV
Input Leakage Current
IL
±0.01
±1μA
Input Capacitance
CIN
15
pF
CMOS DIGITAL OUTPUTS (DOUT, CASCOUT,
DRDYOUT, CLKOUT)
Output Low Voltage
VOL
ISINK = 5mA
0.15 x
VDVDD
V
Output High Voltage
VOH
ISOURCE = 1mA
0.85 x
VDVDD
V
Three-State Leakage Current
ILT
±1
μA
Three-State Capacitance
COUT
15
pF
OPEN-DRAIN DIGITAL OUTPUTS (
OVRFLW, FAULT)
Output Low Voltage
VOL
ISINK = 5mA
0.15 x
VDVDD
V
Output High Voltage
VOH
Internal pullup only
0.85 x
VDVDD
V
Internal Pullup Resistance
30
k
POWER REQUIREMENTS
Analog Supply Voltage
AVDD
3.0
3.6
V
Digital Supply Voltage
DVDD
2.7
VAVDD
V
Normal operation
25
35
mA
Analog Supply Current (Note 11)
IAVDD
Shutdown and fXINCLOCK = 0Hz
0.1
5
μA
Normal operation
11
15
mA
Digital Supply Current (Note 11)
IDVDD
Shutdown and fXINCLOCK = 0Hz
0.3
μA
AC Positive-Supply Rejection
VAVDD = 3.3V + 100mVP-P at 1kHz
70
dB
DC Positive-Supply Rejection
VAVDD = VDVDD = 3.0V to 3.6V
75
dB
ESD PROTECTION
All Pins
ESD
Human Body Model
2.5
kV
TIMING CHARACTERISTICS (Figures 7–10)
SCLK Clock Period
tSCP
50
ns
SCLK Pulse Width (High and Low)
tPW
20
ns
DIN or CS to SCLK Fall Setup
tSU
10
ns
SCLK Fall to DIN Hold
tHD
0ns
SCLK Rise to CS Rise
tCSH1
0ns
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX11040KDBEVKIT# | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX5135/11040/11612 Eval Kit w/ FMC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX11040KEVKIT | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:MAX11040K Evaluation Kit/Daughterboard |
| MAX11040KEVKIT# | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 MAX5135/11040/11612 Eval Kit w/ FMC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX11040KGUU | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:24-/16-Bit, 4-Channel, Simultaneous-Sampling, Cascadable, Sigma-Delta ADCs |
| MAX11040KGUU/GG8 | 制造商:Maxim Integrated Products 功能描述:24-BIT, 4-CHANNEL, SIMULTANEOUS-SAMPLING, CASCADABLE, SIGMA- - Rail/Tube |
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