Aperture delay (tAD) is the time defined between the
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MAX1077/MAX1079
Aperture Delay
Aperture delay (tAD) is the time defined between the
falling edge of CNVST and the instant when an actual
sample is taken.
Signal-to-Noise Ratio
For a waveform perfectly reconstructed from digital sam-
ples, signal-to-noise ratio (SNR) is the ratio of full-scale
analog input (RMS value) to the RMS quantization error
(residual error). The theoretical minimum analog-to-digital
noise is caused by quantization error, and results directly
from the ADC鈥檚 resolution (N bits):
SNR = (6.02 x N + 1.76)dB
In reality, there are other noise sources besides quantiza-
tion noise, including thermal noise, reference noise, clock
jitter, etc. Therefore, SNR is computed by taking the ratio
of the RMS signal to the RMS noise, which includes all
spectral components minus the fundamental, the first five
harmonics, and the DC offset.
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency鈥檚 RMS amplitude to the
RMS equivalent of all other ADC output signals:
SINAD(dB) = 20 x log (SignalRMS / NoiseRMS)
Effective Number of Bits
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC鈥檚 error consists of quantiza-
tion noise only. With an input range equal to the full-scale
range of the ADC, calculate the ENOB as follows:
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the first five harmonics of the input signal to the
fundamental itself. This is expressed as:
where V1 is the fundamental amplitude, and V2 through
V5 are the amplitudes of the 2nd- through 5th-order
harmonics.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of the
RMS amplitude of the fundamental (maximum signal
component) to the RMS value of the next-largest distor-
tion component.
Full-Power Bandwidth
Full-power bandwidth is the frequency at which the input
signal amplitude attenuates by 3dB for a full-scale input.
THD
x
V
VVV
V
log
=
++
+
20
2
3
2
4
2
5
2
1
ENOB
SINAD
(
.
)
.
=
176
602
1.5Msps, Single-Supply, Low-Power, True-
Differential, 10-Bit ADCs with Internal Reference
16
______________________________________________________________________________________
MAX1077
MAX1079
ADSP21_ _ _
VL
SCLK
CNVST
DOUT
VDDINT
RCLK
RFS
TCLK
TFS
DR
Figure 19. Interfacing to the ADSP21_ _ _
10
F
0.1
F
10
F
0.1
F
VDD
GND
VL
SUPPLIES
DGND
VL
DIGITAL
CIRCUITRY
VDD
GND RGND
VL
MAX1077
MAX1079
Figure 20. Power-Supply Grounding Condition
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PDF鎻忚堪
MAX1083AEUE+ IC ADC 10BIT 300KSPS 16-TSSOP
MAX1088ETA+T IC ADC 10BIT 150KSPS 8-TDFN
MAX1090AEEI+ IC ADC 10BIT 400KSPS 28-QSOP
MAX1106EUB+T IC ADC 8BIT LP 10-UMAX
MAX1108EUB+TG07 IC ADC 8BIT SPI/SRL 50K 10UMAX
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