參數(shù)資料
型號: MAX1065BCUI
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface
中文描述: 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO28
封裝: 4.40 MM, TSSOP-28
文件頁數(shù): 12/14頁
文件大小: 335K
代理商: MAX1065BCUI
M
Layout, Grounding, and Bypassing
For best performance, use printed circuit boards. Do not
run analog and digital lines parallel to each other, and do
not lay out digital signal paths underneath the ADC pack-
age. Use separate analog and digital ground planes with
only one point connecting the two ground systems (ana-
log and digital) as close to the device as possible.
Route digital signals far away from sensitive analog and
reference inputs. If digital lines must cross analog lines,
do so at right angles to minimize coupling digital noise
onto the analog lines. If the analog and digital sections
share the same supply, then isolate the digital and ana-
log supply by connecting them with a low-value (10
)
resistor or ferrite bead.
The ADC is sensitive to high-frequency noise on the AV
DD
supply. Bypass AV
DD
to AGND with a 0.1μF capacitor in
parallel with a 1μF to 10μF low-ESR capacitor and the
smallest capacitor closest to the device. Keep capacitor
leads short to minimize stray inductance.
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best-straight-line fit or a line
drawn between the end points of the transfer function,
once offset and gain errors have been nullified. The
static linearity parameters for the MAX1065/MAX1066
are measured using the end-point method.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1LSB. A
DNL error specification of 1LSB guarantees no missing
codes and a monotonic transfer function.
Aperture Jitter and Delay
Aperture jitter is the sample-to-sample variation in the
time between samples. Aperture delay is the time
between the rising edge of the sampling clock and the
instant when the actual sample is taken.
Signal-to-Noise Ratio
For a waveform perfectly reconstructed from digital
samples, signal-to-noise ratio (SNR) is the ratio of the
full-scale analog input (RMS value) to the RMS quanti-
zation error (residual error). The ideal, theoretical mini-
mum analog-to-digital noise is caused by quantization
noise error only and results directly from the ADC
s res-
olution (N-bits):
SNR = (6.02 x N + 1.76)dB
where N = 14 bits.
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reference noise, clock jitter,
etc. SNR is computed by taking the ratio of the RMS
signal to the RMS noise, which includes all spectral
components minus the fundamental, the first five har-
monics, and the DC offset.
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency
s RMS amplitude to the
RMS equivalent of all the other ADC output signals.
Effective Number of Bits
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC
s error consists of quanti-
zation noise only. With an input range equal to the full-
scale range of the ADC, calculate the effective number
of bits as follows:
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the first five harmonics of the input signal to the
fundamental itself. This is expressed as:
where V
1
is the fundamental amplitude and V
2
through
V
5
are the 2nd- through 5th-order harmonics.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of the
RMS amplitude of the fundamental (maximum signal
component) to the RMS value of the next largest fre-
quency component.
Chip Information
TRANSISTOR COUNT: 15,140
PROCESS: BiCMOS
THD
V
V
V
V
V
=
×
+
+
+
20
22
32
42
52
1
log
ENOB
SINAD
=
1 76
.
6 02
.
SINAD dB
Signal
Distortion
+
Noise
(
RMS
RMS
)
(
)
log
=
×
20
Low-Power, 14-Bit Analog-to-Digital Converters
with Parallel Interface
12
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相關代理商/技術參數(shù)
參數(shù)描述
MAX1065BCUI+ 功能描述:模數(shù)轉換器 - ADC Low-Power 14-Bit w/Parallel Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1065BCUI+T 功能描述:模數(shù)轉換器 - ADC Low-Power 14-Bit w/Parallel Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1065BCUI-T 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1065BEUI 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1065BEUI+ 功能描述:模數(shù)轉換器 - ADC Low-Power 14-Bit w/Parallel Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32